[PATCH] D34077: DAGCombine: Combine BUILD_VECTOR to TRUNCATE

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: test/CodeGen/ARM/vpadd.ll:221
 ; CHECK-NEXT:    vld1.64 {d16, d17}, [r0]
-; CHECK-NEXT:    vpadd.i8 d16, d16, d17
+; CHECK-NEXT:    vorr d18, d16, d16
+; CHECK-NEXT:    vorr d19, d17, d17
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zvi wrote:
> This may be a similar issue to https://reviews.llvm.org/D32993#inline-286079.
> Will look into this.
The problem here is pretty straightforward: on trunk, we have two shuffles (which each get lowered to one of the two outputs of ARMISD::VUZP).  With your patch, we have one ARMISD::VUZP, and one ISD::TRUNCATE. The ARM backend doesn't try to reason about this equivalence at all.

(This also eventually blocks the VUZP+VADD->VPADD combine, but that isn't really the important part.)


https://reviews.llvm.org/D34077