[PATCH] D34104: [SROA] Fix APInt size when alloca address space is not 0

Yaxun Liu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 12 07:52:11 PDT 2017


yaxunl created this revision.
Herald added a subscriber: wdng.

SROA assumes alloca address space is 0, which causes assertion. This patch fixes that.


https://reviews.llvm.org/D34104

Files:
  lib/Transforms/Scalar/SROA.cpp
  test/Transforms/SROA/non-zero-alloca-address-space.ll


Index: test/Transforms/SROA/non-zero-alloca-address-space.ll
===================================================================
--- /dev/null
+++ test/Transforms/SROA/non-zero-alloca-address-space.ll
@@ -0,0 +1,31 @@
+; RUN: opt < %s -sroa -S | FileCheck %s
+target datalayout = "e-p:64:64:64-p1:64:64:64-p5:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64-A5"
+
+; Test load from and store to non-zero address space.
+define void @test_load_store_diff_addr_space([2 x float] addrspace(1)* %complex1, [2 x float] addrspace(1)* %complex2) {
+; CHECK-LABEL: @test_load_store_diff_addr_space
+; CHECK-NOT: alloca
+; CHECK: load i32, i32 addrspace(1)*
+; CHECK: load i32, i32 addrspace(1)*
+; CHECK: store i32 %{{.*}}, i32 addrspace(1)*
+; CHECK: store i32 %{{.*}}, i32 addrspace(1)*
+  %a0 = alloca [2 x i64], align 8, addrspace(5)
+  %a = getelementptr [2 x i64], [2 x i64] addrspace(5)* %a0, i32 0, i32 0
+  %a.cast = bitcast i64 addrspace(5)* %a to [2 x float] addrspace(5)*
+  %a.gep1 = getelementptr [2 x float], [2 x float] addrspace(5)* %a.cast, i32 0, i32 0
+  %a.gep2 = getelementptr [2 x float], [2 x float] addrspace(5)* %a.cast, i32 0, i32 1
+  %complex1.gep = getelementptr [2 x float], [2 x float] addrspace(1)* %complex1, i32 0, i32 0
+  %p1 = bitcast float addrspace(1)* %complex1.gep to i64 addrspace(1)*
+  %v1 = load i64, i64 addrspace(1)* %p1
+  store i64 %v1, i64 addrspace(5)* %a
+  %f1 = load float, float addrspace(5)* %a.gep1
+  %f2 = load float, float addrspace(5)* %a.gep2
+  %sum = fadd float %f1, %f2
+  store float %sum, float addrspace(5)* %a.gep1
+  store float %sum, float addrspace(5)* %a.gep2
+  %v2 = load i64, i64 addrspace(5)* %a
+  %complex2.gep = getelementptr [2 x float], [2 x float] addrspace(1)* %complex2, i32 0, i32 0
+  %p2 = bitcast float addrspace(1)* %complex2.gep to i64 addrspace(1)*
+  store i64 %v2, i64 addrspace(1)* %p2
+  ret void
+}
Index: lib/Transforms/Scalar/SROA.cpp
===================================================================
--- lib/Transforms/Scalar/SROA.cpp
+++ lib/Transforms/Scalar/SROA.cpp
@@ -3571,10 +3571,11 @@
     int Idx = 0, Size = Offsets.Splits.size();
     for (;;) {
       auto *PartTy = Type::getIntNTy(Ty->getContext(), PartSize * 8);
-      auto *PartPtrTy = PartTy->getPointerTo(LI->getPointerAddressSpace());
+      auto AS = LI->getPointerAddressSpace();
+      auto *PartPtrTy = PartTy->getPointerTo(AS);
       LoadInst *PLoad = IRB.CreateAlignedLoad(
           getAdjustedPtr(IRB, DL, BasePtr,
-                         APInt(DL.getPointerSizeInBits(), PartOffset),
+                         APInt(DL.getPointerSizeInBits(AS), PartOffset),
                          PartPtrTy, BasePtr->getName() + "."),
           getAdjustedAlignment(LI, PartOffset, DL), /*IsVolatile*/ false,
           LI->getName());


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