[lld] r305096 - Don't check the raw bits in tests.
Rafael Espindola via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 9 11:07:35 PDT 2017
Author: rafael
Date: Fri Jun 9 13:07:34 2017
New Revision: 305096
URL: http://llvm.org/viewvc/llvm-project?rev=305096&view=rev
Log:
Don't check the raw bits in tests.
It is not needed since we have the disassemble.
Modified:
lld/trunk/test/ELF/aarch64-undefined-weak.s
lld/trunk/test/ELF/arm-thumb-no-undefined-thunk.s
lld/trunk/test/ELF/arm-thumb-undefined-weak.s
lld/trunk/test/ELF/arm-undefined-weak.s
Modified: lld/trunk/test/ELF/aarch64-undefined-weak.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-undefined-weak.s?rev=305096&r1=305095&r2=305096&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-undefined-weak.s (original)
+++ lld/trunk/test/ELF/aarch64-undefined-weak.s Fri Jun 9 13:07:34 2017
@@ -33,13 +33,13 @@ _start:
// CHECK: Disassembly of section .text:
// 131076 = 0x20004
-// CHECK: 20000: 01 80 00 14 b #131076
-// CHECK-NEXT: 20004: 02 80 00 94 bl #131080
-// CHECK-NEXT: 20008: 60 00 10 54 b.eq #131084
-// CHECK-NEXT: 2000c: 81 00 10 b4 cbz x1, #131088
-// CHECK-NEXT: 20010: 00 00 00 10 adr x0, #0
-// CHECK-NEXT: 20014: 00 00 00 90 adrp x0, #0
-// CHECK: 20018: 00 00 00 00 .word 0x00000000
-// CHECK-NEXT: 2001c: 00 00 00 00 .word 0x00000000
-// CHECK-NEXT: 20020: 00 00 00 00 .word 0x00000000
-// CHECK-NEXT: 20024: 00 00 .short 0x0000
+// CHECK: 20000: {{.*}} b #131076
+// CHECK-NEXT: 20004: {{.*}} bl #131080
+// CHECK-NEXT: 20008: {{.*}} b.eq #131084
+// CHECK-NEXT: 2000c: {{.*}} cbz x1, #131088
+// CHECK-NEXT: 20010: {{.*}} adr x0, #0
+// CHECK-NEXT: 20014: {{.*}} adrp x0, #0
+// CHECK: 20018: {{.*}} .word 0x00000000
+// CHECK-NEXT: 2001c: {{.*}} .word 0x00000000
+// CHECK-NEXT: 20020: {{.*}} .word 0x00000000
+// CHECK-NEXT: 20024: {{.*}} .short 0x0000
Modified: lld/trunk/test/ELF/arm-thumb-no-undefined-thunk.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thumb-no-undefined-thunk.s?rev=305096&r1=305095&r2=305096&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thumb-no-undefined-thunk.s (original)
+++ lld/trunk/test/ELF/arm-thumb-no-undefined-thunk.s Fri Jun 9 13:07:34 2017
@@ -19,6 +19,6 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-NEXT: _start:
// 69636 = 0x11004 = next instruction
-// CHECK: 11000: 11 f0 02 f8 bl #69636
-// CHECK-NEXT: 11004: 11 f0 04 b8 b.w #69640
-// CHECK-NEXT: 11008: 11 f0 06 b8 b.w #69644
+// CHECK: 11000: {{.*}} bl #69636
+// CHECK-NEXT: 11004: {{.*}} b.w #69640
+// CHECK-NEXT: 11008: {{.*}} b.w #69644
Modified: lld/trunk/test/ELF/arm-thumb-undefined-weak.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-thumb-undefined-weak.s?rev=305096&r1=305095&r2=305096&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-thumb-undefined-weak.s (original)
+++ lld/trunk/test/ELF/arm-thumb-undefined-weak.s Fri Jun 9 13:07:34 2017
@@ -29,10 +29,10 @@ _start:
// CHECK: Disassembly of section .text:
// 69636 = 0x11004
-// CHECK: 11000: 11 f0 02 80 beq.w #69636
-// CHECK-NEXT: 11004: 11 f0 04 b8 b.w #69640
-// CHECK-NEXT: 11008: 11 f0 06 f8 bl #69644
+// CHECK: 11000: {{.*}} beq.w #69636
+// CHECK-NEXT: 11004: {{.*}} b.w #69640
+// CHECK-NEXT: 11008: {{.*}} bl #69644
// blx is transformed into bl so we don't change state
-// CHECK-NEXT: 1100c: 11 f0 08 f8 bl #69648
-// CHECK-NEXT: 11010: c0 f2 00 00 movt r0, #0
-// CHECK-NEXT: 11014: 40 f2 00 00 movw r0, #0
+// CHECK-NEXT: 1100c: {{.*}} bl #69648
+// CHECK-NEXT: 11010: {{.*}} movt r0, #0
+// CHECK-NEXT: 11014: {{.*}} movw r0, #0
Modified: lld/trunk/test/ELF/arm-undefined-weak.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/arm-undefined-weak.s?rev=305096&r1=305095&r2=305096&view=diff
==============================================================================
--- lld/trunk/test/ELF/arm-undefined-weak.s (original)
+++ lld/trunk/test/ELF/arm-undefined-weak.s Fri Jun 9 13:07:34 2017
@@ -29,11 +29,11 @@ _start:
// CHECK: Disassembly of section .text:
// 69636 = 0x11004
-// CHECK: 11000: 01 44 00 ea b #69636
-// CHECK-NEXT: 11004: 02 44 00 eb bl #69640
+// CHECK: 11000: {{.*}} b #69636
+// CHECK-NEXT: 11004: {{.*}} bl #69640
// blx is transformed into bl so we don't change state
-// CHECK-NEXT: 11008: 03 44 00 eb bl #69644
-// CHECK-NEXT: 1100c: 00 00 40 e3 movt r0, #0
-// CHECK-NEXT: 11010: 00 00 00 e3 movw r0, #0
-// CHECK: 11014: 00 00 00 00 .word 0x00000000
+// CHECK-NEXT: 11008: {{.*}} bl #69644
+// CHECK-NEXT: 1100c: {{.*}} movt r0, #0
+// CHECK-NEXT: 11010: {{.*}} movw r0, #0
+// CHECK: 11014: {{.*}} .word 0x00000000
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