[PATCH] D33099: AMD Jaguar scheduler doesn't correctly model 256-bit AVX instructions
Andrew V. Tischenko via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 8 07:22:43 PDT 2017
avt77 updated this revision to Diff 101916.
avt77 added a comment.
All notes from Simon were resolved. In addition I fixed numbers for some XMM versions of VMOVxxxx instructions.
https://reviews.llvm.org/D33099
Files:
lib/Target/X86/X86ScheduleBtVer2.td
test/CodeGen/X86/avx-schedule.ll
test/CodeGen/X86/recip-fastmath.ll
test/CodeGen/X86/recip-fastmath2.ll
test/CodeGen/X86/slow-unaligned-mem.ll
test/CodeGen/X86/sse-schedule.ll
test/CodeGen/X86/sse2-schedule.ll
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