[PATCH] D34009: [Power9] Exploit vector integer extend instructions when indices aren't correct

[Zaara Syeda via Phabricator via llvm-commits]

syzaara created this revision.

This patch adds on to the exploitation added by https://reviews.llvm.org/D33510.
This now catches build vector nodes where the inputs are coming from sign extended vector extract elements where the indices used by the vector extract are not correct. We can still use the new hardware instructions by adding a shuffle to move the elements to the correct indices. I introduced a new PPCISD node here because adding a vector_shuffle and changing the elements of the vector_extracts was getting undone by another DAG combine.


https://reviews.llvm.org/D34009

Files:
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCISelLowering.h
  lib/Target/PowerPC/PPCInstrInfo.td
  lib/Target/PowerPC/PPCInstrVSX.td
  test/CodeGen/PowerPC/vec_int_ext.ll

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