[PATCH] D33949: AMDGPU/GlobalISel: Mark 32-bit G_SELECT as legal

[Tom Stellard via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL304910: AMDGPU/GlobalISel: Mark 32-bit G_SELECT as legal (authored by tstellar).

Changed prior to commit:
  https://reviews.llvm.org/D33949?vs=101592&id=101731#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D33949

Files:
  llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir


Index: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
@@ -0,0 +1,28 @@
+# RUN: llc -O0 -march=amdgcn -mcpu=fiji  -run-pass=legalizer -global-isel %s -o - | FileCheck %s
+
+--- |
+  define void @test_select() { ret void }
+...
+
+---
+name:            test_select
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+  - { id: 4, class: _ }
+  - { id: 5, class: _ }
+body: |
+  bb.0:
+    liveins: %vgpr0
+    %0(s32) = G_CONSTANT i32 0
+    %1(s32) = COPY %vgpr0
+
+    %2(s1) = G_ICMP intpred(ne), %0, %1
+    %3(s32) = G_CONSTANT i32 1
+    %4(s32) = G_CONSTANT i32 2
+    ; CHECK: %5(s32) = G_SELECT %2(s1), %3, %4
+    %5(s32) = G_SELECT %2, %3, %4
+
+...
Index: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -56,6 +56,9 @@
   setAction({G_LOAD, 1, P1}, Legal);
   setAction({G_LOAD, 1, P2}, Legal);
 
+  setAction({G_SELECT, S32}, Legal);
+  setAction({G_SELECT, 1, S1}, Legal);
+
   setAction({G_STORE, S32}, Legal);
   setAction({G_STORE, 1, P1}, Legal);
 


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