[llvm] r304850 - [InlineSpiller] Only account for real spills in the hoisting logic

[Quentin Colombet via llvm-commits]

Author: qcolombet
Date: Tue Jun  6 19:22:07 2017
New Revision: 304850

URL: http://llvm.org/viewvc/llvm-project?rev=304850&view=rev
Log:
[InlineSpiller] Only account for real spills in the hoisting logic

Spills of undef values shouldn't impact the placement of the relevant
spills. Drive by review.

Modified:
    llvm/trunk/lib/CodeGen/InlineSpiller.cpp

Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=304850&r1=304849&r2=304850&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
+++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Tue Jun  6 19:22:07 2017
@@ -877,14 +877,16 @@ void InlineSpiller::insertSpill(unsigned
   MachineBasicBlock &MBB = *MI->getParent();
 
   MachineInstrSpan MIS(MI);
-  if (isFullUndefDef(*MI))
+  bool IsRealSpill = true;
+  if (isFullUndefDef(*MI)) {
     // Don't spill undef value.
     // Anything works for undef, in particular keeping the memory
     // uninitialized is a viable option and it saves code size and
     // run time.
     BuildMI(MBB, std::next(MI), MI->getDebugLoc(), TII.get(TargetOpcode::KILL))
         .addReg(NewVReg, getKillRegState(isKill));
-  else
+    IsRealSpill = false;
+  } else
     TII.storeRegToStackSlot(MBB, std::next(MI), NewVReg, isKill, StackSlot,
                             MRI.getRegClass(NewVReg), &TRI);
 
@@ -893,7 +895,8 @@ void InlineSpiller::insertSpill(unsigned
   DEBUG(dumpMachineInstrRangeWithSlotIndex(std::next(MI), MIS.end(), LIS,
                                            "spill"));
   ++NumSpills;
-  HSpiller.addToMergeableSpills(*std::next(MI), StackSlot, Original);
+  if (IsRealSpill)
+    HSpiller.addToMergeableSpills(*std::next(MI), StackSlot, Original);
 }
 
 /// spillAroundUses - insert spill code around each use of Reg.