[PATCH] D33866: [DAGCombiner] loosen restriction for creating narrow vector load from extract(wide load)

[Nirav Dave via Phabricator via llvm-commits]

niravd added a comment.

It looks like most of the AMDGPU cases fail because:

- TLI.isExtractSubvectorCheap(VT, ExtIdxValue) is not defined for AMDGPU.
- Legalization breaks sign-/zero-extended vectors into a concat of smaller subvectors.

The former seems easy for someone who knows AMDGPU to correct.


https://reviews.llvm.org/D33866