[PATCH] D33866: [DAGCombiner] loosen restriction for creating narrow vector load from extract(wide load)

[Nirav Dave via Phabricator via llvm-commits]

niravd added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:14674
+  // reduces the dependency chain and may reduce register pressure.
+  if (!Ld->hasOneUse() && TLI.isExtractSubvectorCheap(VT, ExtIdxValue))
     return SDValue();
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This is condition looks like it's going to trigger differently on different indexes combining consecutive subvectors extracted from the same larger vector. This is why the vec_int_to_fp case still has a load to zmm0 (see other comment)

It seems like what we'd like to do is check that all uses of Ld are cheap if there is more than one use (and then convert all uses simulatenously). That said, I think checking freeness/cheapness for each possible ExtIdxValue is the way to go.




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Comment at: test/CodeGen/X86/vec_int_to_fp.ll:3669
 ; AVX512F-NEXT:    vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3]
 ; AVX512F-NEXT:    vextracti32x4 $1, %zmm0, %xmm0
 ; AVX512F-NEXT:    vmovq %xmm0, %rax
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We're only partially converting the load-extracts here. there should only be a load to zmmX and extracts or 4 direct loads to xmmX. 


https://reviews.llvm.org/D33866