[PATCH] D33818: [ScheduleDAG] Don't schedule node with physical register interference

[Eli Friedman via Phabricator via llvm-commits]

efriedma created this revision.
Herald added a subscriber: javed.absar.

https://reviews.llvm.org/D31536 didn't really solve the problem it was trying to solve; it got rid of the assertion failure, but we were still scheduling the DAG incorrectly (mixing together instructions from different calls), leading to a MachineVerifier failure.

In order to schedule the DAG correctly, we have to make sure we don't schedule a node which should be blocked by an interference.  Fix ScheduleDAGRRList::PickNodeToScheduleBottomUp so it doesn't pick a node like that.

The added call to FindAvailableNode() is the key change here; this makes sure we don't try to schedule a call while we're in the middle of scheduling a different call.  I'm not sure this is the right approach; in particular, I'm not sure how to prove we don't end up with an infinite loop of repeatedly backtracking.

This also reverts the code change from https://reviews.llvm.org/D31536.  It doesn't do anything useful: we should never schedule an ADJCALLSTACKDOWN unless we've already scheduled the corresponding ADJCALLSTACKUP.


Repository:
  rL LLVM

https://reviews.llvm.org/D33818

Files:
  lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
  test/CodeGen/ARM/unschedule-first-call.ll

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