[llvm] r304454 - [InlineCost] Add a test case for GEP cost

[Haicheng Wu via llvm-commits]

Author: haicheng
Date: Thu Jun  1 14:06:07 2017
New Revision: 304454

URL: http://llvm.org/viewvc/llvm-project?rev=304454&view=rev
Log:
[InlineCost] Add a test case for GEP cost

The added test case is to check whether the simplified value is passed to
getGEPCost().

Differential Revision: https://reviews.llvm.org/D33779

Modified:
    llvm/trunk/test/Transforms/Inline/AArch64/gep-cost.ll

Modified: llvm/trunk/test/Transforms/Inline/AArch64/gep-cost.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/AArch64/gep-cost.ll?rev=304454&r1=304453&r2=304454&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/Inline/AArch64/gep-cost.ll (original)
+++ llvm/trunk/test/Transforms/Inline/AArch64/gep-cost.ll Thu Jun  1 14:06:07 2017
@@ -4,11 +4,21 @@
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 target triple = "aarch64--linux-gnu"
 
-define void @outer([4 x i32]* %ptr, i32 %i) {
+define void @outer1([4 x i32]* %ptr, i32 %i) {
   call void @inner1([4 x i32]* %ptr, i32 %i)
+  ret void
+}
+
+define void @outer2([4 x i32]* %ptr, i32 %i) {
   call void @inner2([4 x i32]* %ptr, i32 %i)
   ret void
 }
+
+define void @outer3([4 x i32]* %ptr, i32 %j) {
+  call void @inner3([4 x i32]* %ptr, i32 0, i32 %j)
+  ret void
+}
+
 ; The gep in inner1() is reg+reg, which is a legal addressing mode for AArch64.
 ; Thus, both the gep and ret can be simplified.
 ; CHECK: Analyzing call of inner1
@@ -19,7 +29,7 @@ define void @inner1([4 x i32]* %ptr, i32
   ret void
 }
 
-; The gep in inner2() is reg+imm+reg, which is not a legal addressing mode for 
+; The gep in inner2() is reg+imm+reg, which is not a legal addressing mode for
 ; AArch64.  Thus, only the ret can be simplified and not the gep.
 ; CHECK: Analyzing call of inner2
 ; CHECK: NumInstructionsSimplified: 1
@@ -28,3 +38,14 @@ define void @inner2([4 x i32]* %ptr, i32
   %G = getelementptr inbounds [4 x i32], [4 x i32]* %ptr, i32 1, i32 %i
   ret void
 }
+
+; The gep in inner3() is reg+reg because %i is a known constant from the
+; callsite. This case is a legal addressing mode for AArch64.  Thus, both the
+; gep and ret can be simplified.
+; CHECK: Analyzing call of inner3
+; CHECK: NumInstructionsSimplified: 2
+; CHECK: NumInstructions: 2
+define void @inner3([4 x i32]* %ptr, i32 %i, i32 %j) {
+  %G = getelementptr inbounds [4 x i32], [4 x i32]* %ptr, i32 %i, i32 %j
+  ret void
+}