[PATCH] D33783: [AMDGPU] Force qsads instrs to use different dest register than source registers

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll:7
 ; GCN-LABEL: {{^}}v_mqsad_pk_u16_u8:
-; GCN: v_mqsad_pk_u16_u8 v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], v{{[0-9]+}}, v[{{[0-9]+:[0-9]+}}]
+; GCN-NOT: v_mqsad_pk_u16_u8 v{{\[}}[[VLO:[0-9]+]]:[[VHI:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], v{{\[}}[[VLO]], v{{\[}}[[VLO]]:[[VHI]]{{\]}}
 define amdgpu_kernel void @v_mqsad_pk_u16_u8(i64 addrspace(1)* %out, i64 %src) {
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You still need a positive check that the instruction was emitted with the proper register class. I also don't think FileCheck supports matching variables that appear later in the same line


https://reviews.llvm.org/D33783