[llvm] r304417 - DAG: Remove pointless type check

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Thu Jun  1 09:49:46 2017
New Revision: 304417

URL: http://llvm.org/viewvc/llvm-project?rev=304417&view=rev
Log:
DAG: Remove pointless type check

These are only integer operations.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=304417&r1=304416&r2=304417&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Jun  1 09:49:46 2017
@@ -1960,7 +1960,7 @@ SDValue DAGCombiner::visitADD(SDNode *N)
 
   // fold (a+b) -> (a|b) iff a and b share no bits.
   if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) &&
-      VT.isInteger() && DAG.haveNoCommonBitsSet(N0, N1))
+      DAG.haveNoCommonBitsSet(N0, N1))
     return DAG.getNode(ISD::OR, DL, VT, N0, N1);
 
   if (SDValue Combined = visitADDLike(N0, N1, N))