[PATCH] D33243: [Atomics][LoopIdiom] Recognize unordered atomic memcpy

[Anna Thomas via Phabricator via llvm-commits]

anna added inline comments.


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Comment at: lib/Transforms/Scalar/LoopIdiomRecognize.cpp:1012
+    unsigned StoreSizeBits = StoreSize * 8;
+    if (StoreSizeBits > TTI->getRegisterBitWidth(false))
+      return false;
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dneilson wrote:
> This is the replacement due to the inability to use RTLIB in ScalarOpt due to a circular dependency.  It's not ideal as it's theoretically possible that larger width versions of the intrinsic's lib call will exist (ex: ones that are implemented to use vector regs for the load/stores), but we won't be able to exploit any that are wider than scalar register width.
> 
Is it possible that even if the `StoreSizeBits` is within the max `registerBitWidth` for the target arch, we do not have the corresponding lib call?
Could you please check if `TLI` has the information you require or can be modified to do so - it seems to have `memset`, `memcpy` etc. 


https://reviews.llvm.org/D33243