[PATCH] D33203: Add scheduler classes to integer/float horizontal operations

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 1 02:00:53 PDT 2017


RKSimon added reviewers: craig.topper, zvi.
RKSimon added a comment.

Adding some Intel guys to look at the SLM/SB/HW model changes.



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Comment at: lib/Target/X86/X86InstrSSE.td:5194
+        IIC_SSE_HADDSUB_RM>,
+      Sched<[WriteHAddLd]>;
 }
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Move on to previous line and re-add ReadAfterLd


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Comment at: lib/Target/X86/X86SchedSandyBridge.td:164
+// TODO: at the moment we don't model horizontal ooperations here that's why
+// it's a simple place holder for future implementation
+// HADD, HSUB PS/PD
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Isn't this comment out of date? You're modelling the horizontal operations below.


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Comment at: lib/Target/X86/X86Schedule.td:82
+defm WriteHAdd  : X86SchedWritePair;
+defm WriteHAddY : X86SchedWritePair;
+defm WritePHAdd : X86SchedWritePair;
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I'm not sure we should be introducing size specific versions - we don't do this for any other cases. Merge back into WriteHAdd?


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Comment at: lib/Target/X86/X86ScheduleBtVer2.td:68
 
+def JVALU01 : ProcResGroup<[JVALU0, JVALU1]>;
+
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You shouldn't need this - just use JFPU01


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Comment at: lib/Target/X86/X86ScheduleSLM.td:144
+// TODO: at the moment we don't model horizontal ooperations here that's why
+// it's a simple place holder for future implementation
+
----------------
Isn't this comment out of date? You're modelling the horizontal operations below.


https://reviews.llvm.org/D33203





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