[PATCH] D31851: [PowerPC] Eliminate compares - add handling for logical operations without the use of condition registers

[Eric Christopher via Phabricator via llvm-commits]

echristo accepted this revision.
echristo added a comment.
This revision is now accepted and ready to land.

SGTM. It still seems a bit overly complicated, but I don't think there's anything for it at the moment.



================
Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2701-2703
+  // Extract the value to a CR bit. If this is a bitwise negation, we simply
+  // extract the EQ bit rather than actually negating the bit set. The logic
+  // is rather simple - the EQ bit is set when the input value is zero.
----------------
nemanjai wrote:
> echristo wrote:
> > I think you mean "single bit" rather than "CR bit" at least I'm reading it that way rather than in a cc register right?
> We have produced a record-form machine node above. The code immediately after this comment actually gets a single bit out of CR0 (which was set by the record-form op) and selects this logical operation to that bit. So it is a single bit, but it **is** in a CR - CR0 to be specific.
> Perhaps it is clearer if I set the comment to this:
> ```
> // Select this node to a single bit from CR0 set by the record-form node
> // just created. For bitwise negation, use the EQ bit which is the equivalent
> // of negating the result (i.e. it is a bit set when the result of the operation
> // is zero).
> ```
SGTM.


Repository:
  rL LLVM

https://reviews.llvm.org/D31851