[PATCH] D31494: [PowerPC] Pretty-print CR bits the way the binutils disassembler does

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added inline comments.


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Comment at: lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp:451
+static const char *stripRegisterPrefix(const char *RegName, unsigned RegNum) {
+  if (FullRegNames || ShowVSRNumsAsVR) {
+    if (RegNum >= PPC::CR0EQ && RegNum <= PPC::CR7UN) {
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hfinkel wrote:
> This ShowVSRNumsAsVR seems broken ; should we just get rid of it?
Can you elaborate a bit on why you feel it's broken? It should just display things like `vs34` as `v2` and we use it here just to prevent the `v` from getting stripped from the output.


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Comment at: lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp:453
+    if (RegNum >= PPC::CR0EQ && RegNum <= PPC::CR7UN) {
+      unsigned BitNo = atoi(RegName);
+      const char *CRBits[] =
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hfinkel wrote:
> Hrmm. Is TRI available here? The real way of doing this is to get the encoding value for the register. From PPCAsmPrinter.cpp, for example, we have this:
> 
>       unsigned Mask = 0x80 >> OutContext.getRegisterInfo()
>                               ->getEncodingValue(MI->getOperand(0).getReg());
> 
> It is possible that just using MRI.getEncodingValue(RegNum) will work here. It looks like it might (MCInstPrinter has an MRI protected member, and because the encoding values come from TableGen, I think that MCRegisterInfo should have them).
> 
Ah, thanks for the pointer. This makes perfect sense.


Repository:
  rL LLVM

https://reviews.llvm.org/D31494