[PATCH] D33576: [AMDGPU] Require waitcnt before barrier for all targets; adjust tests.
    Mark Searles via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Fri May 26 15:18:30 PDT 2017
    
    
  
msearles updated this revision to Diff 100481.
msearles added a comment.
Ug. Fix revision; added wrong set of diffs; correcting.
https://reviews.llvm.org/D33576
Files:
  lib/Target/AMDGPU/AMDGPUSubtarget.h
  test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
Index: test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
===================================================================
--- test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
+++ test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
@@ -3,9 +3,8 @@
 ; GCN-LABEL: {{^}}test_barrier:
 ; GFX8: buffer_store_dword
-; GFX8: s_waitcnt
 ; GFX9: flat_store_dword
-; GFX9-NOT: s_waitcnt
+; GCN: s_waitcnt
 ; GCN: s_barrier
 define amdgpu_kernel void @test_barrier(i32 addrspace(1)* %out, i32 %size) #0 {
 entry:
Index: lib/Target/AMDGPU/AMDGPUSubtarget.h
===================================================================
--- lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -730,7 +730,7 @@
   /// \returns True if waitcnt instruction is needed before barrier instruction,
   /// false otherwise.
   bool needWaitcntBeforeBarrier() const {
-    return getGeneration() < GFX9;
+    return true;
   }
   /// \returns true if the flat_scratch register should be initialized with the
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D33576.100481.patch
Type: text/x-patch
Size: 990 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170526/51fac489/attachment.bin>
    
    
More information about the llvm-commits
mailing list