[llvm] r304015 - [AMDGPU][MC][GFX9] Corrected encoding of flat_scratch* for SDWA opcodes
Dmitry Preobrazhensky via llvm-commits
llvm-commits at lists.llvm.org
Fri May 26 11:01:30 PDT 2017
Author: dpreobra
Date: Fri May 26 13:01:29 2017
New Revision: 304015
URL: http://llvm.org/viewvc/llvm-project?rev=304015&view=rev
Log:
[AMDGPU][MC][GFX9] Corrected encoding of flat_scratch* for SDWA opcodes
See bug 33171: https://bugs.llvm.org/show_bug.cgi?id=33171
Reviewers: Sam Kolton
Differential Revision: https://reviews.llvm.org/D33553
Modified:
llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
llvm/trunk/test/MC/AMDGPU/vop_sdwa.s
Modified: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp?rev=304015&r1=304014&r2=304015&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp Fri May 26 13:01:29 2017
@@ -340,7 +340,7 @@ SIMCCodeEmitter::getSDWA9SrcEncoding(con
unsigned Reg = MO.getReg();
RegEnc |= MRI.getEncodingValue(Reg);
RegEnc &= SDWA9EncValues::SRC_VGPR_MASK;
- if (AMDGPU::isSGPR(Reg, &MRI)) {
+ if (AMDGPU::isSGPR(AMDGPU::mc2PseudoReg(Reg), &MRI)) {
RegEnc |= SDWA9EncValues::SRC_SGPR_MASK;
}
return RegEnc;
Modified: llvm/trunk/test/MC/AMDGPU/vop_sdwa.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/vop_sdwa.s?rev=304015&r1=304014&r2=304015&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/vop_sdwa.s (original)
+++ llvm/trunk/test/MC/AMDGPU/vop_sdwa.s Fri May 26 13:01:29 2017
@@ -686,6 +686,10 @@ v_cmp_eq_f32_sdwa vcc, v1, s22 src0_sel:
// NOGFX9: error: invalid operand (violates constant bus restrictions)
v_cmp_eq_f32_sdwa vcc, exec, vcc src0_sel:WORD_1 src1_sel:BYTE_2
+// NOSICI: error:
+// NOVI: error:
+// GFX9: v_ceil_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0x66,0x06,0x86,0x06]
+v_ceil_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
//===----------------------------------------------------------------------===//
// VOPC with arbitrary SGPR destination
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