[PATCH] D33583: [AMDGPU] Allow SDWA in instructions with immediates and SGPRs

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 25 20:53:57 PDT 2017


rampitec created this revision.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng.

An encoding does not allow to use SDWA in an instruction with
scalar operands, either literals or SGPRs. That is however possible
to copy these operands into a VGPR first.

Several copies of the value are produced if multiple SDWA conversions
were done. To cleanup MachineLICM (to hoist copies out of loops),
MachineCSE (to remove duplicate copies) and SIFoldOperands (to replace
SGPR to VGPR copy with immediate copy right to the VGPR) runs are added
after the SDWA pass.


Repository:
  rL LLVM

https://reviews.llvm.org/D33583

Files:
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  lib/Target/AMDGPU/SIFoldOperands.cpp
  lib/Target/AMDGPU/SIPeepholeSDWA.cpp
  test/CodeGen/AMDGPU/add.v2i16.ll
  test/CodeGen/AMDGPU/bfe-combine.ll
  test/CodeGen/AMDGPU/commute-compares.ll
  test/CodeGen/AMDGPU/commute_modifiers.ll
  test/CodeGen/AMDGPU/copy-illegal-type.ll
  test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
  test/CodeGen/AMDGPU/fabs.f64.ll
  test/CodeGen/AMDGPU/fabs.ll
  test/CodeGen/AMDGPU/fadd.f16.ll
  test/CodeGen/AMDGPU/fadd64.ll
  test/CodeGen/AMDGPU/fcanonicalize.f16.ll
  test/CodeGen/AMDGPU/fmul.f16.ll
  test/CodeGen/AMDGPU/fneg-fabs.f16.ll
  test/CodeGen/AMDGPU/fneg-fabs.f64.ll
  test/CodeGen/AMDGPU/fneg-fabs.ll
  test/CodeGen/AMDGPU/fneg.f16.ll
  test/CodeGen/AMDGPU/fract.f64.ll
  test/CodeGen/AMDGPU/fsub.f16.ll
  test/CodeGen/AMDGPU/fsub64.ll
  test/CodeGen/AMDGPU/immv216.ll
  test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
  test/CodeGen/AMDGPU/llvm.fma.f16.ll
  test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
  test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
  test/CodeGen/AMDGPU/llvm.minnum.f16.ll
  test/CodeGen/AMDGPU/mad24-get-global-id.ll
  test/CodeGen/AMDGPU/madak.ll
  test/CodeGen/AMDGPU/madmk.ll
  test/CodeGen/AMDGPU/mul.ll
  test/CodeGen/AMDGPU/scratch-simple.ll
  test/CodeGen/AMDGPU/sdiv.ll
  test/CodeGen/AMDGPU/sdwa-peephole.ll
  test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
  test/CodeGen/AMDGPU/select.f16.ll
  test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
  test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
  test/CodeGen/AMDGPU/sminmax.v2i16.ll
  test/CodeGen/AMDGPU/srem.ll
  test/CodeGen/AMDGPU/sub.v2i16.ll
  test/CodeGen/AMDGPU/udiv.ll
  test/CodeGen/AMDGPU/urem.ll
  test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
  test/CodeGen/AMDGPU/v_mac_f16.ll
  test/CodeGen/AMDGPU/wqm.ll

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