[llvm] r303940 - [PPC] Add text for assert.
Tim Shen via llvm-commits
llvm-commits at lists.llvm.org
Thu May 25 16:40:46 PDT 2017
Author: timshen
Date: Thu May 25 18:40:46 2017
New Revision: 303940
URL: http://llvm.org/viewvc/llvm-project?rev=303940&view=rev
Log:
[PPC] Add text for assert.
Modified:
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=303940&r1=303939&r2=303940&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu May 25 18:40:46 2017
@@ -8296,7 +8296,7 @@ SDValue PPCTargetLowering::LowerINTRINSI
SDLoc DL(Op);
switch (cast<ConstantSDNode>(Op.getOperand(ArgStart))->getZExtValue()) {
case Intrinsic::ppc_cfence: {
- assert(ArgStart == 1);
+ assert(ArgStart == 1 && "llvm.ppc.cfence must carry a chain argument.");
assert(Subtarget.isPPC64() && "Only 64-bit is supported for now.");
return SDValue(DAG.getMachineNode(PPC::CFENCE8, DL, MVT::Other,
DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64,
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