[PATCH] D33494: [mips] Fix multiprecision arithmetic.
Simon Dardis via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 24 06:30:46 PDT 2017
sdardis created this revision.
Herald added a subscriber: arichardson.
For multiprecision arithmetic on MIPS, rather than using ISD::ADDE / ISD::ADDC,
get SelectionDAG to break down the operation into ISD::ADDs and ISD::SETCC. Also
improve the generation code in such cases for targets with
TargetLoweringBase::ZeroOrOneBooleanContent by directly using the result of the
comparison node rather than using it in selects. Similarly for ISD::SUBE /
ISD::SUBC.
For MIPS, only the DSP ASE has a carry flag, so in the general case it is not
useful to directly support ISD::{ADDE, ADDC, SUBE, SUBC} nodes.
Address optimization breakage by moving the generation of MIPS specific integer
multiply-accumulate nodes to before operation legalization.
This revolves PR32713.
Thanks to Simonas Kazlauskas for reporting the issue!
Repository:
rL LLVM
https://reviews.llvm.org/D33494
Files:
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/Mips/MipsSEISelDAGToDAG.cpp
lib/Target/Mips/MipsSEISelDAGToDAG.h
lib/Target/Mips/MipsSEISelLowering.cpp
test/CodeGen/Mips/2008-06-05-Carry.ll
test/CodeGen/Mips/dsp-patterns.ll
test/CodeGen/Mips/llcarry.ll
test/CodeGen/Mips/llvm-ir/add.ll
test/CodeGen/Mips/llvm-ir/sub.ll
test/CodeGen/Mips/madd-msub.ll
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