[PATCH] D33369: [PowerPC] Eliminate compares - add i64 sext/zext handling for equality
Eric Christopher via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 23 11:53:25 PDT 2017
echristo accepted this revision.
echristo added a comment.
This revision is now accepted and ready to land.
A few cosmetic changes in addition to the notation change that was mentioned (I also like that).
Otherwise LGTM.
-eric
================
Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2833
+ int64_t RHSValue, SDLoc dl) {
+ bool IsRHSZero = RHSValue == 0;
+ switch (CC) {
----------------
Seems to be unused at the moment?
================
Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2855
+ int64_t RHSValue, SDLoc dl) {
+ bool IsRHSZero = RHSValue == 0;
+ switch (CC) {
----------------
Ditto.
================
Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2928
ConstantSDNode *RHSConst = dyn_cast<ConstantSDNode>(RHS);
+ bool Inputs32Bit = InputVT == MVT::i32;
int64_t RHSValue = RHSConst ? RHSConst->getSExtValue() : INT64_MAX;
----------------
Can you move this down to just before the first use?
Repository:
rL LLVM
https://reviews.llvm.org/D33369
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