[PATCH] D33443: Fix PR33031: Cannot scavenge register without an emergency spill slot.

[Kristof Beyls via Phabricator via llvm-commits]

kristof.beyls created this revision.
Herald added a subscriber: javed.absar.

Also see the discussion on https://bugs.llvm.org/show_bug.cgi?id=33031.

This patch contains 2 conceptual changes:

- Introducing option -reg-scavenging-always-use-spill-slot to enable writing maintainable tests for register scavenging.
- Fix the underlying reason for PR33031: correct the estimate of maximum offset for instructions spilling/filling the stack.

I think both conceptual changes are implemented in a somewhat non-ideal way here, but those are the best engineering tradeoffs I've found so far.
Do the trade-offs taken here seem acceptable?


https://reviews.llvm.org/D33443

Files:
  lib/CodeGen/RegisterScavenging.cpp
  lib/Target/AArch64/AArch64FrameLowering.cpp
  test/CodeGen/AArch64/reg-scavenge-frame.mir

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