[PATCH] D33435: [SelectionDAG] reset NewNodesMustHaveLegalTypes flag between basic blocks

[Guy Blank via Phabricator via llvm-commits]

guyblank created this revision.
Herald added subscribers: javed.absar, aemerson.

The NewNodesMustHaveLegalTypes  flag is set to false at the beginning of CodeGenAndEmitDAG, and set to true after legalizing types.
But before calling CodeGenAndEmitDAG we build the DAG for the basic block. So for the first basic block NewNodesMustHaveLegalTypes would be 'false' during the SDAG building, and for all other basic blocks it would be 'true'.

This patch sets the flag to false before SDAG building each basic block.

While the patch affects an AArch64 test, the test would produce the same result in trunk if moved to be the first function in the file. So someone familiar with the AArch64 codegen might want to take a look at the test regardless.


https://reviews.llvm.org/D33435

Files:
  lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  test/CodeGen/AArch64/fold-constants.ll


Index: test/CodeGen/AArch64/fold-constants.ll
===================================================================
--- test/CodeGen/AArch64/fold-constants.ll
+++ test/CodeGen/AArch64/fold-constants.ll
@@ -19,9 +19,19 @@
 
 ; PR25763 - folding constant vector comparisons with sign-extended result
 define <8 x i16> @dotests_458() {
+; CHECK-LABEL: .LCPI1_0:
+; CHECK:       .hword  0                       // 0x0
+; CHECK-NEXT:  .hword  0                       // 0x0
+; CHECK-NEXT:  .hword  65535                   // 0xffff
+; CHECK-NEXT:  .hword  0                       // 0x0
+; CHECK-NEXT:  .hword  0                       // 0x0
+; CHECK-NEXT:  .hword  0                       // 0x0
+; CHECK-NEXT:  .hword  0                       // 0x0
+; CHECK-NEXT:  .hword  0                       // 0x0
+
 ; CHECK-LABEL: dotests_458
-; CHECK:       movi d0, #0x00000000ff0000
-; CHECK-NEXT:  sshll v0.8h, v0.8b, #0
+; CHECK:       adrp    x8, .LCPI1_0
+; CHECK-NEXT:  ldr     q0, [x8, :lo12:.LCPI1_0]
 ; CHECK-NEXT:  ret
 entry:
   %vclz_v.i = call <8 x i8> @llvm.ctlz.v8i8(<8 x i8> <i8 127, i8 38, i8 -1, i8 -128, i8 127, i8 0, i8 0, i8 0>, i1 false) #6
Index: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -636,6 +636,7 @@
                                         bool &HadTailCall) {
   // Lower the instructions. If a call is emitted as a tail call, cease emitting
   // nodes for this block.
+  CurDAG->NewNodesMustHaveLegalTypes = false;
   for (BasicBlock::const_iterator I = Begin; I != End && !SDB->HasTailCall; ++I) {
     if (!ElidedArgCopyInstrs.count(&*I))
       SDB->visit(*I);


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