[PATCH] D33369: [PowerPC] Eliminate compares - add i64 sext/zext handling for equality

[Hiroshi Inoue via Phabricator via llvm-commits]

inouehrs added inline comments.


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Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2860
+    // addc.0 = (addcarry (xor %a, %b), -1)
+    // addc.1 = (addcarry (xor %a, %b), -1).1
+    // (sext (setcc %a, %b, seteq)) -> (sube addc.0, addc.0, addc.1)
----------------
Do you mean CA bit by `addc.1`?
IMO, `{addc.reg, addc.CA} = (addcarry (xor %a, %b), -1)` or similar is clearer.
Someone may misunderstand that we need to execute addcarry twice with the current pseudo-code.


Repository:
  rL LLVM

https://reviews.llvm.org/D33369