[llvm] r303396 - LiveIntervalAnalysis: Fix missing case in pruneSubRegValues()

[Matthias Braun via llvm-commits]

Indeed, thanks.

> On May 19, 2017, at 5:43 AM, Volkan Keles <vkeles at apple.com> wrote:
> 
> Hi Matthias,
> 
> There is a typo in the test. Could you check my comment below?
> 
>> On May 19, 2017, at 1:18 AM, Matthias Braun via llvm-commits <llvm-commits at lists.llvm.org <mailto:llvm-commits at lists.llvm.org>> wrote:
>> 
>> Author: matze
>> Date: Thu May 18 19:18:03 2017
>> New Revision: 303396
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=303396&view=rev <http://llvm.org/viewvc/llvm-project?rev=303396&view=rev>
>> Log:
>> LiveIntervalAnalysis: Fix missing case in pruneSubRegValues()
>> 
>> pruneSubRegValues() needs to remove subregister ranges starting at
>> instructions that later get removed by eraseInstrs(). It missed to check
>> one case in which eraseInstrs() would remove an instruction.
>> 
>> Fixes http://llvm.org/PR32688 <http://llvm.org/PR32688>
>> 
>> Added:
>>    llvm/trunk/test/CodeGen/AMDGPU/regcoalesce-prune.mir
>> Modified:
>>    llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
>> 
>> Modified: llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp?rev=303396&r1=303395&r2=303396&view=diff <http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp?rev=303396&r1=303395&r2=303396&view=diff>
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp Thu May 18 19:18:03 2017
>> @@ -2666,11 +2666,17 @@ void JoinVals::pruneSubRegValues(LiveInt
>>   // Look for values being erased.
>>   bool DidPrune = false;
>>   for (unsigned i = 0, e = LR.getNumValNums(); i != e; ++i) {
>> -    if (Vals[i].Resolution != CR_Erase)
>> +    // We should trigger in all cases in which eraseInstrs() does something.
>> +    // match what eraseInstrs() is doing, print a message so
>> +    if (Vals[i].Resolution != CR_Erase &&
>> +        (Vals[i].Resolution != CR_Keep || !Vals[i].ErasableImplicitDef ||
>> +         !Vals[i].Pruned))
>>       continue;
>> 
>>     // Check subranges at the point where the copy will be removed.
>>     SlotIndex Def = LR.getValNumInfo(i)->def;
>> +    // Print message so mismatches with eraseInstrs() can be diagnosed.
>> +    DEBUG(dbgs() << "\t\tExpecting instruction removal at " << Def << '\n');
>>     for (LiveInterval::SubRange &S : LI.subranges()) {
>>       LiveQueryResult Q = S.Query(Def);
>> 
>> 
>> Added: llvm/trunk/test/CodeGen/AMDGPU/regcoalesce-prune.mir
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/regcoalesce-prune.mir?rev=303396&view=auto <http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/regcoalesce-prune.mir?rev=303396&view=auto>
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/AMDGPU/regcoalesce-prune.mir (added)
>> +++ llvm/trunk/test/CodeGen/AMDGPU/regcoalesce-prune.mir Thu May 18 19:18:03 2017
>> @@ -0,0 +1,31 @@
>> +# RUN: llc -o - %s -mtriple=amdgcn-amd-amdhsa-opencl -run-pass=simple-register-coalescing | FileCheck %s
>> +---
>> +# Checks for a bug where subregister liveranges were not properly pruned for
>> +# an IMPLCITI_DEF that gets removed completely.
>> +#
>> +# CHECK-LABEL: name: func
>> +# IMPLICIT_DEF should be gone without llc hitting assertion failures.
>> +# CHECK-NOT: IMPLCITI_DEF
> 
> IMPLCITI_DEF —> IMPLICIT_DEF
> 
>> +name: func
>> +tracksRegLiveness: true
>> +body: |
>> +  bb.0:
>> +    undef %5.sub1 = V_MOV_B32_e32 0, implicit %exec
>> +    %6 = COPY %5
>> +    S_CBRANCH_VCCZ %bb.2, implicit undef %vcc
>> +
>> +  bb.1:
>> +    %1 : sreg_32_xm0 = S_MOV_B32 0
>> +    undef %0.sub0 : sreg_64 = COPY %1
>> +    %0.sub1 = COPY %1
>> +    %4 : vreg_64 = COPY killed %0
>> +    %5 : vreg_64 = IMPLICIT_DEF
>> +    %6 : vreg_64 = COPY killed %4
>> +
>> +  bb.2:
>> +    %2 : vgpr_32 = V_CVT_F32_I32_e32 killed %5.sub1, implicit %exec
>> +
>> +  bb.3:
>> +    %3 : vgpr_32 = V_CVT_F32_I32_e32 killed %6.sub1, implicit %exec
>> +    S_ENDPGM
>> +...
>> 
>> 
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> 
> Thanks,
> Volkan

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