[PATCH] D33222: [LegacyPassManager] Remove TargetMachine constructors
Francis Visoiu Mistrih via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 18 10:34:47 PDT 2017
This revision was automatically updated to reflect the committed changes.
thegameg marked an inline comment as done.
Closed by commit rL303360: [LegacyPassManager] Remove TargetMachine constructors (authored by thegameg).
Changed prior to commit:
https://reviews.llvm.org/D33222?vs=99191&id=99460#toc
Repository:
rL LLVM
https://reviews.llvm.org/D33222
Files:
llvm/trunk/include/llvm/CodeGen/Passes.h
llvm/trunk/include/llvm/CodeGen/StackProtector.h
llvm/trunk/include/llvm/PassInfo.h
llvm/trunk/include/llvm/PassSupport.h
llvm/trunk/lib/CodeGen/AtomicExpandPass.cpp
llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp
llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
llvm/trunk/lib/CodeGen/InterleavedAccessPass.cpp
llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
llvm/trunk/lib/CodeGen/LowerEmuTLS.cpp
llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
llvm/trunk/lib/CodeGen/SafeStack.cpp
llvm/trunk/lib/CodeGen/StackProtector.cpp
llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
llvm/trunk/lib/CodeGen/WinEHPrepare.cpp
llvm/trunk/lib/IR/PassRegistry.cpp
llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPU.h
llvm/trunk/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/trunk/lib/Target/AMDGPU/R600ClauseMergePass.cpp
llvm/trunk/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
llvm/trunk/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
llvm/trunk/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
llvm/trunk/lib/Target/AMDGPU/R600Packetizer.cpp
llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp
llvm/trunk/lib/Target/Mips/Mips.h
llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp
llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp
llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp
llvm/trunk/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp
llvm/trunk/lib/Target/Mips/MipsOptimizePICCall.cpp
llvm/trunk/lib/Target/Mips/MipsOs16.cpp
llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp
llvm/trunk/lib/Target/Sparc/LeonPasses.cpp
llvm/trunk/lib/Target/Sparc/LeonPasses.h
llvm/trunk/lib/Target/Sparc/Sparc.h
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp
llvm/trunk/test/CodeGen/Generic/opt-codegen-no-target-machine.ll
llvm/trunk/test/CodeGen/X86/O0-pipeline.ll
llvm/trunk/tools/llc/llc.cpp
llvm/trunk/tools/opt/opt.cpp
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