[llvm] r303340 - [X86] Add explicit triple to test invocation
Zvi Rackover via llvm-commits
llvm-commits at lists.llvm.org
Thu May 18 02:32:57 PDT 2017
Author: zvi
Date: Thu May 18 04:32:56 2017
New Revision: 303340
URL: http://llvm.org/viewvc/llvm-project?rev=303340&view=rev
Log:
[X86] Add explicit triple to test invocation
Modified:
llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll
llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll
Modified: llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll?rev=303340&r1=303339&r2=303340&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll Thu May 18 04:32:56 2017
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mcpu=x86-64 -mattr=+sse2 < %s | FileCheck %s --check-prefixes=CHECK,SSE2
-; RUN: llc -mcpu=x86-64 -mattr=+ssse3 < %s | FileCheck %s --check-prefixes=CHECK,SSSE3
-; RUN: llc -mcpu=x86-64 -mattr=+avx < %s | FileCheck %s --check-prefixes=CHECK,AVX1
-; RUN: llc -mcpu=x86-64 -mattr=+avx512f,+avx512vl,+avx512bw < %s | FileCheck %s --check-prefixes=CHECK,AVX512
+; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=x86-64 -mattr=+sse2 < %s | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=x86-64 -mattr=+ssse3 < %s | FileCheck %s --check-prefixes=CHECK,SSSE3
+; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=x86-64 -mattr=+avx < %s | FileCheck %s --check-prefixes=CHECK,AVX1
+; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=x86-64 -mattr=+avx512f,+avx512vl,+avx512bw < %s | FileCheck %s --check-prefixes=CHECK,AVX512
define i8 @v8i16(<8 x i16> %a, <8 x i16> %b) {
; SSE2-LABEL: v8i16:
-; SSE2: # BB#0:
+; SSE2: ## BB#0:
; SSE2-NEXT: pcmpgtw %xmm1, %xmm0
; SSE2-NEXT: pextrw $7, %xmm0, %eax
; SSE2-NEXT: andl $1, %eax
@@ -36,7 +36,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; SSE2-NEXT: retq
;
; SSSE3-LABEL: v8i16:
-; SSSE3: # BB#0:
+; SSSE3: ## BB#0:
; SSSE3-NEXT: pcmpgtw %xmm1, %xmm0
; SSSE3-NEXT: pextrw $7, %xmm0, %eax
; SSSE3-NEXT: andl $1, %eax
@@ -66,7 +66,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; SSSE3-NEXT: retq
;
; AVX1-LABEL: v8i16:
-; AVX1: # BB#0:
+; AVX1: ## BB#0:
; AVX1-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpextrw $7, %xmm0, %eax
; AVX1-NEXT: andl $1, %eax
@@ -96,10 +96,10 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; AVX1-NEXT: retq
;
; AVX512-LABEL: v8i16:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vpcmpgtw %xmm1, %xmm0, %k0
; AVX512-NEXT: kmovd %k0, %eax
-; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512-NEXT: ## kill: %AL<def> %AL<kill> %EAX<kill>
; AVX512-NEXT: retq
%x = icmp sgt <8 x i16> %a, %b
%res = bitcast <8 x i1> %x to i8
@@ -108,7 +108,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
define i4 @v4i32(<4 x i32> %a, <4 x i32> %b) {
; SSE2-LABEL: v4i32:
-; SSE2: # BB#0:
+; SSE2: ## BB#0:
; SSE2-NEXT: pcmpgtd %xmm1, %xmm0
; SSE2-NEXT: movd %xmm0, %eax
; SSE2-NEXT: andl $1, %eax
@@ -129,7 +129,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
; SSE2-NEXT: retq
;
; SSSE3-LABEL: v4i32:
-; SSSE3: # BB#0:
+; SSSE3: ## BB#0:
; SSSE3-NEXT: pcmpgtd %xmm1, %xmm0
; SSSE3-NEXT: movd %xmm0, %eax
; SSSE3-NEXT: andl $1, %eax
@@ -150,7 +150,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
; SSSE3-NEXT: retq
;
; AVX1-LABEL: v4i32:
-; AVX1: # BB#0:
+; AVX1: ## BB#0:
; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpextrd $3, %xmm0, %eax
; AVX1-NEXT: andl $1, %eax
@@ -168,7 +168,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
; AVX1-NEXT: retq
;
; AVX512-LABEL: v4i32:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vpcmpgtd %xmm1, %xmm0, %k0
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -181,7 +181,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
define i4 @v4f32(<4 x float> %a, <4 x float> %b) {
; SSE2-LABEL: v4f32:
-; SSE2: # BB#0:
+; SSE2: ## BB#0:
; SSE2-NEXT: cmpltps %xmm0, %xmm1
; SSE2-NEXT: movd %xmm1, %eax
; SSE2-NEXT: andl $1, %eax
@@ -203,7 +203,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
; SSE2-NEXT: retq
;
; SSSE3-LABEL: v4f32:
-; SSSE3: # BB#0:
+; SSSE3: ## BB#0:
; SSSE3-NEXT: cmpltps %xmm0, %xmm1
; SSSE3-NEXT: movd %xmm1, %eax
; SSSE3-NEXT: andl $1, %eax
@@ -225,7 +225,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
; SSSE3-NEXT: retq
;
; AVX1-LABEL: v4f32:
-; AVX1: # BB#0:
+; AVX1: ## BB#0:
; AVX1-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vextractps $3, %xmm0, %eax
; AVX1-NEXT: andl $1, %eax
@@ -243,7 +243,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
; AVX1-NEXT: retq
;
; AVX512-LABEL: v4f32:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vcmpltps %xmm0, %xmm1, %k0
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -256,7 +256,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
define i16 @v16i8(<16 x i8> %a, <16 x i8> %b) {
; SSE2-LABEL: v16i8:
-; SSE2: # BB#0:
+; SSE2: ## BB#0:
; SSE2-NEXT: pcmpgtb %xmm1, %xmm0
; SSE2-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al
@@ -311,7 +311,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
; SSE2-NEXT: retq
;
; SSSE3-LABEL: v16i8:
-; SSSE3: # BB#0:
+; SSSE3: ## BB#0:
; SSSE3-NEXT: pcmpgtb %xmm1, %xmm0
; SSSE3-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
; SSSE3-NEXT: movb -{{[0-9]+}}(%rsp), %al
@@ -366,7 +366,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
; SSSE3-NEXT: retq
;
; AVX1-LABEL: v16i8:
-; AVX1: # BB#0:
+; AVX1: ## BB#0:
; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpextrb $15, %xmm0, %eax
; AVX1-NEXT: andb $1, %al
@@ -420,10 +420,10 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
; AVX1-NEXT: retq
;
; AVX512-LABEL: v16i8:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vpcmpgtb %xmm1, %xmm0, %k0
; AVX512-NEXT: kmovd %k0, %eax
-; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
; AVX512-NEXT: retq
%x = icmp sgt <16 x i8> %a, %b
%res = bitcast <16 x i1> %x to i16
@@ -432,7 +432,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
define i2 @v2i64(<2 x i64> %a, <2 x i64> %b) {
; SSE2-LABEL: v2i64:
-; SSE2: # BB#0:
+; SSE2: ## BB#0:
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0]
; SSE2-NEXT: pxor %xmm2, %xmm1
; SSE2-NEXT: pxor %xmm2, %xmm0
@@ -455,7 +455,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; SSE2-NEXT: retq
;
; SSSE3-LABEL: v2i64:
-; SSSE3: # BB#0:
+; SSSE3: ## BB#0:
; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0]
; SSSE3-NEXT: pxor %xmm2, %xmm1
; SSSE3-NEXT: pxor %xmm2, %xmm0
@@ -478,7 +478,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; SSSE3-NEXT: retq
;
; AVX1-LABEL: v2i64:
-; AVX1: # BB#0:
+; AVX1: ## BB#0:
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpextrq $1, %xmm0, %rax
; AVX1-NEXT: andl $1, %eax
@@ -490,7 +490,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; AVX1-NEXT: retq
;
; AVX512-LABEL: v2i64:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vpcmpgtq %xmm1, %xmm0, %k0
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -503,7 +503,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
define i2 @v2f64(<2 x double> %a, <2 x double> %b) {
; SSE2-LABEL: v2f64:
-; SSE2: # BB#0:
+; SSE2: ## BB#0:
; SSE2-NEXT: cmpltpd %xmm0, %xmm1
; SSE2-NEXT: movq %xmm1, %rax
; SSE2-NEXT: andl $1, %eax
@@ -516,7 +516,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
; SSE2-NEXT: retq
;
; SSSE3-LABEL: v2f64:
-; SSSE3: # BB#0:
+; SSSE3: ## BB#0:
; SSSE3-NEXT: cmpltpd %xmm0, %xmm1
; SSSE3-NEXT: movq %xmm1, %rax
; SSSE3-NEXT: andl $1, %eax
@@ -529,7 +529,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
; SSSE3-NEXT: retq
;
; AVX1-LABEL: v2f64:
-; AVX1: # BB#0:
+; AVX1: ## BB#0:
; AVX1-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vpextrq $1, %xmm0, %rax
; AVX1-NEXT: andl $1, %eax
@@ -541,7 +541,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
; AVX1-NEXT: retq
;
; AVX512-LABEL: v2f64:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vcmpltpd %xmm0, %xmm1, %k0
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
Modified: llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll?rev=303340&r1=303339&r2=303340&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll Thu May 18 04:32:56 2017
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mcpu=x86-64 -mattr=+avx2 < %s | FileCheck %s --check-prefix=AVX2
-; RUN: llc -mcpu=x86-64 -mattr=+avx512f,+avx512vl,+avx512bw < %s | FileCheck %s --check-prefix=AVX512
+; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=x86-64 -mattr=+avx2 < %s | FileCheck %s --check-prefix=AVX2
+; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=x86-64 -mattr=+avx512f,+avx512vl,+avx512bw < %s | FileCheck %s --check-prefix=AVX512
define i16 @v16i16(<16 x i16> %a, <16 x i16> %b) {
; AVX2-LABEL: v16i16:
-; AVX2: # BB#0:
+; AVX2: ## BB#0:
; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
@@ -61,10 +61,10 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; AVX2-NEXT: retq
;
; AVX512-LABEL: v16i16:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %k0
; AVX512-NEXT: kmovd %k0, %eax
-; AVX512-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512-NEXT: ## kill: %AX<def> %AX<kill> %EAX<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%x = icmp sgt <16 x i16> %a, %b
@@ -74,7 +74,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
define i8 @v8i32(<8 x i32> %a, <8 x i32> %b) {
; AVX2-LABEL: v8i32:
-; AVX2: # BB#0:
+; AVX2: ## BB#0:
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
@@ -107,10 +107,10 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; AVX2-NEXT: retq
;
; AVX512-LABEL: v8i32:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
; AVX512-NEXT: kmovd %k0, %eax
-; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512-NEXT: ## kill: %AL<def> %AL<kill> %EAX<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%x = icmp sgt <8 x i32> %a, %b
@@ -120,7 +120,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
define i8 @v8f32(<8 x float> %a, <8 x float> %b) {
; AVX2-LABEL: v8f32:
-; AVX2: # BB#0:
+; AVX2: ## BB#0:
; AVX2-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
@@ -153,10 +153,10 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; AVX2-NEXT: retq
;
; AVX512-LABEL: v8f32:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vcmpltps %ymm0, %ymm1, %k0
; AVX512-NEXT: kmovd %k0, %eax
-; AVX512-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
+; AVX512-NEXT: ## kill: %AL<def> %AL<kill> %EAX<kill>
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%x = fcmp ogt <8 x float> %a, %b
@@ -166,14 +166,14 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
define i32 @v32i8(<32 x i8> %a, <32 x i8> %b) {
; AVX2-LABEL: v32i8:
-; AVX2: # BB#0:
+; AVX2: ## BB#0:
; AVX2-NEXT: pushq %rbp
-; AVX2-NEXT: .Lcfi0:
+; AVX2-NEXT: Lcfi0:
; AVX2-NEXT: .cfi_def_cfa_offset 16
-; AVX2-NEXT: .Lcfi1:
+; AVX2-NEXT: Lcfi1:
; AVX2-NEXT: .cfi_offset %rbp, -16
; AVX2-NEXT: movq %rsp, %rbp
-; AVX2-NEXT: .Lcfi2:
+; AVX2-NEXT: Lcfi2:
; AVX2-NEXT: .cfi_def_cfa_register %rbp
; AVX2-NEXT: andq $-32, %rsp
; AVX2-NEXT: subq $32, %rsp
@@ -282,7 +282,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; AVX2-NEXT: retq
;
; AVX512-LABEL: v32i8:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %k0
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: vzeroupper
@@ -294,7 +294,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
define i4 @v4i64(<4 x i64> %a, <4 x i64> %b) {
; AVX2-LABEL: v4i64:
-; AVX2: # BB#0:
+; AVX2: ## BB#0:
; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
@@ -315,7 +315,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; AVX2-NEXT: retq
;
; AVX512-LABEL: v4i64:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %k0
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -329,7 +329,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
define i4 @v4f64(<4 x double> %a, <4 x double> %b) {
; AVX2-LABEL: v4f64:
-; AVX2: # BB#0:
+; AVX2: ## BB#0:
; AVX2-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
@@ -350,7 +350,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
; AVX2-NEXT: retq
;
; AVX512-LABEL: v4f64:
-; AVX512: # BB#0:
+; AVX512: ## BB#0:
; AVX512-NEXT: vcmpltpd %ymm0, %ymm1, %k0
; AVX512-NEXT: kmovd %k0, %eax
; AVX512-NEXT: movb %al, -{{[0-9]+}}(%rsp)
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