[llvm] r303300 - [X86][AVX512] Add 512-bit vector ctlz costs + tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed May 17 14:02:19 PDT 2017
Author: rksimon
Date: Wed May 17 16:02:18 2017
New Revision: 303300
URL: http://llvm.org/viewvc/llvm-project?rev=303300&view=rev
Log:
[X86][AVX512] Add 512-bit vector ctlz costs + tests
Modified:
llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/trunk/test/Analysis/CostModel/X86/ctlz.ll
Modified: llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp?rev=303300&r1=303299&r2=303300&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp Wed May 17 16:02:18 2017
@@ -1392,11 +1392,29 @@ int X86TTIImpl::getIntrinsicInstrCost(In
// CTLZ: llvm\test\CodeGen\X86\vector-lzcnt-*.ll
// CTPOP: llvm\test\CodeGen\X86\vector-popcnt-*.ll
// CTTZ: llvm\test\CodeGen\X86\vector-tzcnt-*.ll
+ static const CostTblEntry AVX512CDCostTbl[] = {
+ { ISD::CTLZ, MVT::v8i64, 1 },
+ { ISD::CTLZ, MVT::v16i32, 1 },
+ { ISD::CTLZ, MVT::v32i16, 8 },
+ { ISD::CTLZ, MVT::v64i8, 20 },
+ { ISD::CTLZ, MVT::v4i64, 1 },
+ { ISD::CTLZ, MVT::v8i32, 1 },
+ { ISD::CTLZ, MVT::v16i16, 4 },
+ { ISD::CTLZ, MVT::v32i8, 10 },
+ { ISD::CTLZ, MVT::v2i64, 1 },
+ { ISD::CTLZ, MVT::v4i32, 1 },
+ { ISD::CTLZ, MVT::v8i16, 4 },
+ { ISD::CTLZ, MVT::v16i8, 4 },
+ };
static const CostTblEntry AVX512BWCostTbl[] = {
{ ISD::BITREVERSE, MVT::v8i64, 5 },
{ ISD::BITREVERSE, MVT::v16i32, 5 },
{ ISD::BITREVERSE, MVT::v32i16, 5 },
{ ISD::BITREVERSE, MVT::v64i8, 5 },
+ { ISD::CTLZ, MVT::v8i64, 23 },
+ { ISD::CTLZ, MVT::v16i32, 22 },
+ { ISD::CTLZ, MVT::v32i16, 18 },
+ { ISD::CTLZ, MVT::v64i8, 17 },
{ ISD::CTTZ, MVT::v8i64, 10 },
{ ISD::CTTZ, MVT::v16i32, 14 },
{ ISD::CTTZ, MVT::v32i16, 12 },
@@ -1405,6 +1423,8 @@ int X86TTIImpl::getIntrinsicInstrCost(In
static const CostTblEntry AVX512CostTbl[] = {
{ ISD::BITREVERSE, MVT::v8i64, 36 },
{ ISD::BITREVERSE, MVT::v16i32, 24 },
+ { ISD::CTLZ, MVT::v8i64, 29 },
+ { ISD::CTLZ, MVT::v16i32, 35 },
{ ISD::CTTZ, MVT::v8i64, 20 },
{ ISD::CTTZ, MVT::v16i32, 28 },
};
@@ -1566,6 +1586,10 @@ int X86TTIImpl::getIntrinsicInstrCost(In
MVT MTy = LT.second;
// Attempt to lookup cost.
+ if (ST->hasCDI())
+ if (const auto *Entry = CostTableLookup(AVX512CDCostTbl, ISD, MTy))
+ return LT.first * Entry->Cost;
+
if (ST->hasBWI())
if (const auto *Entry = CostTableLookup(AVX512BWCostTbl, ISD, MTy))
return LT.first * Entry->Cost;
Modified: llvm/trunk/test/Analysis/CostModel/X86/ctlz.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/CostModel/X86/ctlz.ll?rev=303300&r1=303299&r2=303300&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/CostModel/X86/ctlz.ll (original)
+++ llvm/trunk/test/Analysis/CostModel/X86/ctlz.ll Wed May 17 16:02:18 2017
@@ -1,9 +1,12 @@
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=pentium4 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE2 -check-prefix=NOPOPCNT
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE42 -check-prefix=POPCNT
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1 -check-prefix=POPCNT
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core-avx2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2 -check-prefix=POPCNT
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1 -check-prefix=POPCNT
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver4 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2 -check-prefix=POPCNT
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=pentium4 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE2
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE42
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core-avx2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver4 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=knl -mattr=-avx512cd -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX512 -check-prefix=AVX512F
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skx -mattr=-avx512cd -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX512 -check-prefix=AVX512BW
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skx -mattr=+avx512cd -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX512CD
; Verify the cost of scalar leading zero count instructions.
@@ -80,11 +83,18 @@ declare <8 x i32> @llvm.ctlz.v8i32(<8 x
declare <16 x i16> @llvm.ctlz.v16i16(<16 x i16>, i1)
declare <32 x i8> @llvm.ctlz.v32i8(<32 x i8>, i1)
+declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>, i1)
+declare <16 x i32> @llvm.ctlz.v16i32(<16 x i32>, i1)
+declare <32 x i16> @llvm.ctlz.v32i16(<32 x i16>, i1)
+declare <64 x i8> @llvm.ctlz.v64i8(<64 x i8>, i1)
+
define <2 x i64> @var_ctlz_v2i64(<2 x i64> %a) {
; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v2i64':
; SSE2: Found an estimated cost of 25 for instruction: %ctlz
; SSE42: Found an estimated cost of 23 for instruction: %ctlz
; AVX: Found an estimated cost of 23 for instruction: %ctlz
+; AVX512: Found an estimated cost of 23 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
%ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 0)
ret <2 x i64> %ctlz
}
@@ -94,6 +104,8 @@ define <2 x i64> @var_ctlz_v2i64u(<2 x i
; SSE2: Found an estimated cost of 25 for instruction: %ctlz
; SSE42: Found an estimated cost of 23 for instruction: %ctlz
; AVX: Found an estimated cost of 23 for instruction: %ctlz
+; AVX512: Found an estimated cost of 23 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
%ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 1)
ret <2 x i64> %ctlz
}
@@ -104,6 +116,8 @@ define <4 x i64> @var_ctlz_v4i64(<4 x i6
; SSE42: Found an estimated cost of 46 for instruction: %ctlz
; AVX1: Found an estimated cost of 48 for instruction: %ctlz
; AVX2: Found an estimated cost of 23 for instruction: %ctlz
+; AVX512: Found an estimated cost of 23 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
%ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 0)
ret <4 x i64> %ctlz
}
@@ -114,15 +128,45 @@ define <4 x i64> @var_ctlz_v4i64u(<4 x i
; SSE42: Found an estimated cost of 46 for instruction: %ctlz
; AVX1: Found an estimated cost of 48 for instruction: %ctlz
; AVX2: Found an estimated cost of 23 for instruction: %ctlz
+; AVX512: Found an estimated cost of 23 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
%ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 1)
ret <4 x i64> %ctlz
}
+define <8 x i64> @var_ctlz_v8i64(<8 x i64> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v8i64':
+; SSE2: Found an estimated cost of 100 for instruction: %ctlz
+; SSE42: Found an estimated cost of 92 for instruction: %ctlz
+; AVX1: Found an estimated cost of 96 for instruction: %ctlz
+; AVX2: Found an estimated cost of 46 for instruction: %ctlz
+; AVX512F: Found an estimated cost of 29 for instruction: %ctlz
+; AVX512BW: Found an estimated cost of 23 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
+ %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 0)
+ ret <8 x i64> %ctlz
+}
+
+define <8 x i64> @var_ctlz_v8i64u(<8 x i64> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v8i64u':
+; SSE2: Found an estimated cost of 100 for instruction: %ctlz
+; SSE42: Found an estimated cost of 92 for instruction: %ctlz
+; AVX1: Found an estimated cost of 96 for instruction: %ctlz
+; AVX2: Found an estimated cost of 46 for instruction: %ctlz
+; AVX512F: Found an estimated cost of 29 for instruction: %ctlz
+; AVX512BW: Found an estimated cost of 23 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
+ %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 1)
+ ret <8 x i64> %ctlz
+}
+
define <4 x i32> @var_ctlz_v4i32(<4 x i32> %a) {
; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v4i32':
; SSE2: Found an estimated cost of 26 for instruction: %ctlz
; SSE42: Found an estimated cost of 18 for instruction: %ctlz
; AVX: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
%ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 0)
ret <4 x i32> %ctlz
}
@@ -132,6 +176,8 @@ define <4 x i32> @var_ctlz_v4i32u(<4 x i
; SSE2: Found an estimated cost of 26 for instruction: %ctlz
; SSE42: Found an estimated cost of 18 for instruction: %ctlz
; AVX: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
%ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 1)
ret <4 x i32> %ctlz
}
@@ -142,6 +188,8 @@ define <8 x i32> @var_ctlz_v8i32(<8 x i3
; SSE42: Found an estimated cost of 36 for instruction: %ctlz
; AVX1: Found an estimated cost of 38 for instruction: %ctlz
; AVX2: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
%ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 0)
ret <8 x i32> %ctlz
}
@@ -152,15 +200,45 @@ define <8 x i32> @var_ctlz_v8i32u(<8 x i
; SSE42: Found an estimated cost of 36 for instruction: %ctlz
; AVX1: Found an estimated cost of 38 for instruction: %ctlz
; AVX2: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
%ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 1)
ret <8 x i32> %ctlz
}
+define <16 x i32> @var_ctlz_v16i32(<16 x i32> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v16i32':
+; SSE2: Found an estimated cost of 104 for instruction: %ctlz
+; SSE42: Found an estimated cost of 72 for instruction: %ctlz
+; AVX1: Found an estimated cost of 76 for instruction: %ctlz
+; AVX2: Found an estimated cost of 36 for instruction: %ctlz
+; AVX512F: Found an estimated cost of 35 for instruction: %ctlz
+; AVX512BW: Found an estimated cost of 22 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
+ %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 0)
+ ret <16 x i32> %ctlz
+}
+
+define <16 x i32> @var_ctlz_v16i32u(<16 x i32> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v16i32u':
+; SSE2: Found an estimated cost of 104 for instruction: %ctlz
+; SSE42: Found an estimated cost of 72 for instruction: %ctlz
+; AVX1: Found an estimated cost of 76 for instruction: %ctlz
+; AVX2: Found an estimated cost of 36 for instruction: %ctlz
+; AVX512F: Found an estimated cost of 35 for instruction: %ctlz
+; AVX512BW: Found an estimated cost of 22 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 1 for instruction: %ctlz
+ %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 1)
+ ret <16 x i32> %ctlz
+}
+
define <8 x i16> @var_ctlz_v8i16(<8 x i16> %a) {
; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v8i16':
; SSE2: Found an estimated cost of 20 for instruction: %ctlz
; SSE42: Found an estimated cost of 14 for instruction: %ctlz
; AVX: Found an estimated cost of 14 for instruction: %ctlz
+; AVX512: Found an estimated cost of 14 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 4 for instruction: %ctlz
%ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 0)
ret <8 x i16> %ctlz
}
@@ -170,6 +248,8 @@ define <8 x i16> @var_ctlz_v8i16u(<8 x i
; SSE2: Found an estimated cost of 20 for instruction: %ctlz
; SSE42: Found an estimated cost of 14 for instruction: %ctlz
; AVX: Found an estimated cost of 14 for instruction: %ctlz
+; AVX512: Found an estimated cost of 14 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 4 for instruction: %ctlz
%ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 1)
ret <8 x i16> %ctlz
}
@@ -180,6 +260,8 @@ define <16 x i16> @var_ctlz_v16i16(<16 x
; SSE42: Found an estimated cost of 28 for instruction: %ctlz
; AVX1: Found an estimated cost of 30 for instruction: %ctlz
; AVX2: Found an estimated cost of 14 for instruction: %ctlz
+; AVX512: Found an estimated cost of 14 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 4 for instruction: %ctlz
%ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 0)
ret <16 x i16> %ctlz
}
@@ -190,15 +272,45 @@ define <16 x i16> @var_ctlz_v16i16u(<16
; SSE42: Found an estimated cost of 28 for instruction: %ctlz
; AVX1: Found an estimated cost of 30 for instruction: %ctlz
; AVX2: Found an estimated cost of 14 for instruction: %ctlz
+; AVX512: Found an estimated cost of 14 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 4 for instruction: %ctlz
%ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 1)
ret <16 x i16> %ctlz
}
+define <32 x i16> @var_ctlz_v32i16(<32 x i16> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v32i16':
+; SSE2: Found an estimated cost of 80 for instruction: %ctlz
+; SSE42: Found an estimated cost of 56 for instruction: %ctlz
+; AVX1: Found an estimated cost of 60 for instruction: %ctlz
+; AVX2: Found an estimated cost of 28 for instruction: %ctlz
+; AVX512F: Found an estimated cost of 28 for instruction: %ctlz
+; AVX512BW: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 8 for instruction: %ctlz
+ %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 0)
+ ret <32 x i16> %ctlz
+}
+
+define <32 x i16> @var_ctlz_v32i16u(<32 x i16> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v32i16u':
+; SSE2: Found an estimated cost of 80 for instruction: %ctlz
+; SSE42: Found an estimated cost of 56 for instruction: %ctlz
+; AVX1: Found an estimated cost of 60 for instruction: %ctlz
+; AVX2: Found an estimated cost of 28 for instruction: %ctlz
+; AVX512F: Found an estimated cost of 28 for instruction: %ctlz
+; AVX512BW: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 8 for instruction: %ctlz
+ %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 1)
+ ret <32 x i16> %ctlz
+}
+
define <16 x i8> @var_ctlz_v16i8(<16 x i8> %a) {
; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v16i8':
; SSE2: Found an estimated cost of 17 for instruction: %ctlz
; SSE42: Found an estimated cost of 9 for instruction: %ctlz
; AVX: Found an estimated cost of 9 for instruction: %ctlz
+; AVX512: Found an estimated cost of 9 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 4 for instruction: %ctlz
%ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 0)
ret <16 x i8> %ctlz
}
@@ -208,6 +320,8 @@ define <16 x i8> @var_ctlz_v16i8u(<16 x
; SSE2: Found an estimated cost of 17 for instruction: %ctlz
; SSE42: Found an estimated cost of 9 for instruction: %ctlz
; AVX: Found an estimated cost of 9 for instruction: %ctlz
+; AVX512: Found an estimated cost of 9 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 4 for instruction: %ctlz
%ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 1)
ret <16 x i8> %ctlz
}
@@ -218,6 +332,8 @@ define <32 x i8> @var_ctlz_v32i8(<32 x i
; SSE42: Found an estimated cost of 18 for instruction: %ctlz
; AVX1: Found an estimated cost of 20 for instruction: %ctlz
; AVX2: Found an estimated cost of 9 for instruction: %ctlz
+; AVX512: Found an estimated cost of 9 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 10 for instruction: %ctlz
%ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 0)
ret <32 x i8> %ctlz
}
@@ -228,6 +344,34 @@ define <32 x i8> @var_ctlz_v32i8u(<32 x
; SSE42: Found an estimated cost of 18 for instruction: %ctlz
; AVX1: Found an estimated cost of 20 for instruction: %ctlz
; AVX2: Found an estimated cost of 9 for instruction: %ctlz
+; AVX512: Found an estimated cost of 9 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 10 for instruction: %ctlz
%ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 1)
ret <32 x i8> %ctlz
}
+
+define <64 x i8> @var_ctlz_v64i8(<64 x i8> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v64i8':
+; SSE2: Found an estimated cost of 68 for instruction: %ctlz
+; SSE42: Found an estimated cost of 36 for instruction: %ctlz
+; AVX1: Found an estimated cost of 40 for instruction: %ctlz
+; AVX2: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512F: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512BW: Found an estimated cost of 17 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 20 for instruction: %ctlz
+ %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 0)
+ ret <64 x i8> %ctlz
+}
+
+define <64 x i8> @var_ctlz_v64i8u(<64 x i8> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_ctlz_v64i8u':
+; SSE2: Found an estimated cost of 68 for instruction: %ctlz
+; SSE42: Found an estimated cost of 36 for instruction: %ctlz
+; AVX1: Found an estimated cost of 40 for instruction: %ctlz
+; AVX2: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512F: Found an estimated cost of 18 for instruction: %ctlz
+; AVX512BW: Found an estimated cost of 17 for instruction: %ctlz
+; AVX512CD: Found an estimated cost of 20 for instruction: %ctlz
+ %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 1)
+ ret <64 x i8> %ctlz
+}
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