[llvm] r303293 - [X86][AVX512] Add 512-bit vector cttz costs + tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed May 17 13:22:54 PDT 2017
Author: rksimon
Date: Wed May 17 15:22:54 2017
New Revision: 303293
URL: http://llvm.org/viewvc/llvm-project?rev=303293&view=rev
Log:
[X86][AVX512] Add 512-bit vector cttz costs + tests
Modified:
llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/trunk/test/Analysis/CostModel/X86/cttz.ll
Modified: llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp?rev=303293&r1=303292&r2=303293&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp Wed May 17 15:22:54 2017
@@ -1397,10 +1397,16 @@ int X86TTIImpl::getIntrinsicInstrCost(In
{ ISD::BITREVERSE, MVT::v16i32, 5 },
{ ISD::BITREVERSE, MVT::v32i16, 5 },
{ ISD::BITREVERSE, MVT::v64i8, 5 },
+ { ISD::CTTZ, MVT::v8i64, 10 },
+ { ISD::CTTZ, MVT::v16i32, 14 },
+ { ISD::CTTZ, MVT::v32i16, 12 },
+ { ISD::CTTZ, MVT::v64i8, 9 },
};
static const CostTblEntry AVX512CostTbl[] = {
{ ISD::BITREVERSE, MVT::v8i64, 36 },
{ ISD::BITREVERSE, MVT::v16i32, 24 },
+ { ISD::CTTZ, MVT::v8i64, 20 },
+ { ISD::CTTZ, MVT::v16i32, 28 },
};
static const CostTblEntry XOPCostTbl[] = {
{ ISD::BITREVERSE, MVT::v4i64, 4 },
Modified: llvm/trunk/test/Analysis/CostModel/X86/cttz.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/CostModel/X86/cttz.ll?rev=303293&r1=303292&r2=303293&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/CostModel/X86/cttz.ll (original)
+++ llvm/trunk/test/Analysis/CostModel/X86/cttz.ll Wed May 17 15:22:54 2017
@@ -1,9 +1,11 @@
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=pentium4 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE2 -check-prefix=NOPOPCNT
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE42 -check-prefix=POPCNT
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1 -check-prefix=POPCNT
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core-avx2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2 -check-prefix=POPCNT
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1 -check-prefix=POPCNT
-; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver4 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2 -check-prefix=POPCNT
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=pentium4 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE2
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE42
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core-avx2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver4 -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=knl -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX512 -check-prefix=AVX512F
+; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skx -cost-model -analyze | FileCheck %s -check-prefix=CHECK -check-prefix=AVX512 -check-prefix=AVX512BW
; Verify the cost of scalar trailing zero count instructions.
@@ -80,11 +82,17 @@ declare <8 x i32> @llvm.cttz.v8i32(<8 x
declare <16 x i16> @llvm.cttz.v16i16(<16 x i16>, i1)
declare <32 x i8> @llvm.cttz.v32i8(<32 x i8>, i1)
+declare <8 x i64> @llvm.cttz.v8i64(<8 x i64>, i1)
+declare <16 x i32> @llvm.cttz.v16i32(<16 x i32>, i1)
+declare <32 x i16> @llvm.cttz.v32i16(<32 x i16>, i1)
+declare <64 x i8> @llvm.cttz.v64i8(<64 x i8>, i1)
+
define <2 x i64> @var_cttz_v2i64(<2 x i64> %a) {
; CHECK: 'Cost Model Analysis' for function 'var_cttz_v2i64':
; SSE2: Found an estimated cost of 14 for instruction: %cttz
; SSE42: Found an estimated cost of 10 for instruction: %cttz
; AVX: Found an estimated cost of 10 for instruction: %cttz
+; AVX512: Found an estimated cost of 10 for instruction: %cttz
%cttz = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a, i1 0)
ret <2 x i64> %cttz
}
@@ -94,6 +102,7 @@ define <2 x i64> @var_cttz_v2i64u(<2 x i
; SSE2: Found an estimated cost of 14 for instruction: %cttz
; SSE42: Found an estimated cost of 10 for instruction: %cttz
; AVX: Found an estimated cost of 10 for instruction: %cttz
+; AVX512: Found an estimated cost of 10 for instruction: %cttz
%cttz = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a, i1 1)
ret <2 x i64> %cttz
}
@@ -104,6 +113,7 @@ define <4 x i64> @var_cttz_v4i64(<4 x i6
; SSE42: Found an estimated cost of 20 for instruction: %cttz
; AVX1: Found an estimated cost of 22 for instruction: %cttz
; AVX2: Found an estimated cost of 10 for instruction: %cttz
+; AVX512: Found an estimated cost of 10 for instruction: %cttz
%cttz = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %a, i1 0)
ret <4 x i64> %cttz
}
@@ -114,15 +124,41 @@ define <4 x i64> @var_cttz_v4i64u(<4 x i
; SSE42: Found an estimated cost of 20 for instruction: %cttz
; AVX1: Found an estimated cost of 22 for instruction: %cttz
; AVX2: Found an estimated cost of 10 for instruction: %cttz
+; AVX512: Found an estimated cost of 10 for instruction: %cttz
%cttz = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %a, i1 1)
ret <4 x i64> %cttz
}
+define <8 x i64> @var_cttz_v8i64(<8 x i64> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_cttz_v8i64':
+; SSE2: Found an estimated cost of 56 for instruction: %cttz
+; SSE42: Found an estimated cost of 40 for instruction: %cttz
+; AVX1: Found an estimated cost of 44 for instruction: %cttz
+; AVX2: Found an estimated cost of 20 for instruction: %cttz
+; AVX512F: Found an estimated cost of 20 for instruction: %cttz
+; AVX512BW: Found an estimated cost of 10 for instruction: %cttz
+ %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 0)
+ ret <8 x i64> %cttz
+}
+
+define <8 x i64> @var_cttz_v8i64u(<8 x i64> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_cttz_v8i64u':
+; SSE2: Found an estimated cost of 56 for instruction: %cttz
+; SSE42: Found an estimated cost of 40 for instruction: %cttz
+; AVX1: Found an estimated cost of 44 for instruction: %cttz
+; AVX2: Found an estimated cost of 20 for instruction: %cttz
+; AVX512F: Found an estimated cost of 20 for instruction: %cttz
+; AVX512BW: Found an estimated cost of 10 for instruction: %cttz
+ %cttz = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %a, i1 1)
+ ret <8 x i64> %cttz
+}
+
define <4 x i32> @var_cttz_v4i32(<4 x i32> %a) {
; CHECK: 'Cost Model Analysis' for function 'var_cttz_v4i32':
; SSE2: Found an estimated cost of 18 for instruction: %cttz
; SSE42: Found an estimated cost of 14 for instruction: %cttz
; AVX: Found an estimated cost of 14 for instruction: %cttz
+; AVX512: Found an estimated cost of 14 for instruction: %cttz
%cttz = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %a, i1 0)
ret <4 x i32> %cttz
}
@@ -132,6 +168,7 @@ define <4 x i32> @var_cttz_v4i32u(<4 x i
; SSE2: Found an estimated cost of 18 for instruction: %cttz
; SSE42: Found an estimated cost of 14 for instruction: %cttz
; AVX: Found an estimated cost of 14 for instruction: %cttz
+; AVX512: Found an estimated cost of 14 for instruction: %cttz
%cttz = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %a, i1 1)
ret <4 x i32> %cttz
}
@@ -142,6 +179,7 @@ define <8 x i32> @var_cttz_v8i32(<8 x i3
; SSE42: Found an estimated cost of 28 for instruction: %cttz
; AVX1: Found an estimated cost of 30 for instruction: %cttz
; AVX2: Found an estimated cost of 14 for instruction: %cttz
+; AVX512: Found an estimated cost of 14 for instruction: %cttz
%cttz = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %a, i1 0)
ret <8 x i32> %cttz
}
@@ -152,15 +190,41 @@ define <8 x i32> @var_cttz_v8i32u(<8 x i
; SSE42: Found an estimated cost of 28 for instruction: %cttz
; AVX1: Found an estimated cost of 30 for instruction: %cttz
; AVX2: Found an estimated cost of 14 for instruction: %cttz
+; AVX512: Found an estimated cost of 14 for instruction: %cttz
%cttz = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %a, i1 1)
ret <8 x i32> %cttz
}
+define <16 x i32> @var_cttz_v16i32(<16 x i32> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_cttz_v16i32':
+; SSE2: Found an estimated cost of 72 for instruction: %cttz
+; SSE42: Found an estimated cost of 56 for instruction: %cttz
+; AVX1: Found an estimated cost of 60 for instruction: %cttz
+; AVX2: Found an estimated cost of 28 for instruction: %cttz
+; AVX512F: Found an estimated cost of 28 for instruction: %cttz
+; AVX512BW: Found an estimated cost of 14 for instruction: %cttz
+ %cttz = call <16 x i32> @llvm.cttz.v16i32(<16 x i32> %a, i1 0)
+ ret <16 x i32> %cttz
+}
+
+define <16 x i32> @var_cttz_v16i32u(<16 x i32> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_cttz_v16i32u':
+; SSE2: Found an estimated cost of 72 for instruction: %cttz
+; SSE42: Found an estimated cost of 56 for instruction: %cttz
+; AVX1: Found an estimated cost of 60 for instruction: %cttz
+; AVX2: Found an estimated cost of 28 for instruction: %cttz
+; AVX512F: Found an estimated cost of 28 for instruction: %cttz
+; AVX512BW: Found an estimated cost of 14 for instruction: %cttz
+ %cttz = call <16 x i32> @llvm.cttz.v16i32(<16 x i32> %a, i1 1)
+ ret <16 x i32> %cttz
+}
+
define <8 x i16> @var_cttz_v8i16(<8 x i16> %a) {
; CHECK: 'Cost Model Analysis' for function 'var_cttz_v8i16':
; SSE2: Found an estimated cost of 16 for instruction: %cttz
; SSE42: Found an estimated cost of 12 for instruction: %cttz
; AVX: Found an estimated cost of 12 for instruction: %cttz
+; AVX512: Found an estimated cost of 12 for instruction: %cttz
%cttz = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %a, i1 0)
ret <8 x i16> %cttz
}
@@ -170,6 +234,7 @@ define <8 x i16> @var_cttz_v8i16u(<8 x i
; SSE2: Found an estimated cost of 16 for instruction: %cttz
; SSE42: Found an estimated cost of 12 for instruction: %cttz
; AVX: Found an estimated cost of 12 for instruction: %cttz
+; AVX512: Found an estimated cost of 12 for instruction: %cttz
%cttz = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %a, i1 1)
ret <8 x i16> %cttz
}
@@ -180,6 +245,7 @@ define <16 x i16> @var_cttz_v16i16(<16 x
; SSE42: Found an estimated cost of 24 for instruction: %cttz
; AVX1: Found an estimated cost of 26 for instruction: %cttz
; AVX2: Found an estimated cost of 12 for instruction: %cttz
+; AVX512: Found an estimated cost of 12 for instruction: %cttz
%cttz = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> %a, i1 0)
ret <16 x i16> %cttz
}
@@ -190,15 +256,41 @@ define <16 x i16> @var_cttz_v16i16u(<16
; SSE42: Found an estimated cost of 24 for instruction: %cttz
; AVX1: Found an estimated cost of 26 for instruction: %cttz
; AVX2: Found an estimated cost of 12 for instruction: %cttz
+; AVX512: Found an estimated cost of 12 for instruction: %cttz
%cttz = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> %a, i1 1)
ret <16 x i16> %cttz
}
+define <32 x i16> @var_cttz_v32i16(<32 x i16> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_cttz_v32i16':
+; SSE2: Found an estimated cost of 64 for instruction: %cttz
+; SSE42: Found an estimated cost of 48 for instruction: %cttz
+; AVX1: Found an estimated cost of 52 for instruction: %cttz
+; AVX2: Found an estimated cost of 24 for instruction: %cttz
+; AVX512F: Found an estimated cost of 24 for instruction: %cttz
+; AVX512BW: Found an estimated cost of 12 for instruction: %cttz
+ %cttz = call <32 x i16> @llvm.cttz.v32i16(<32 x i16> %a, i1 0)
+ ret <32 x i16> %cttz
+}
+
+define <32 x i16> @var_cttz_v32i16u(<32 x i16> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_cttz_v32i16u':
+; SSE2: Found an estimated cost of 64 for instruction: %cttz
+; SSE42: Found an estimated cost of 48 for instruction: %cttz
+; AVX1: Found an estimated cost of 52 for instruction: %cttz
+; AVX2: Found an estimated cost of 24 for instruction: %cttz
+; AVX512F: Found an estimated cost of 24 for instruction: %cttz
+; AVX512BW: Found an estimated cost of 12 for instruction: %cttz
+ %cttz = call <32 x i16> @llvm.cttz.v32i16(<32 x i16> %a, i1 1)
+ ret <32 x i16> %cttz
+}
+
define <16 x i8> @var_cttz_v16i8(<16 x i8> %a) {
; CHECK: 'Cost Model Analysis' for function 'var_cttz_v16i8':
; SSE2: Found an estimated cost of 13 for instruction: %cttz
; SSE42: Found an estimated cost of 9 for instruction: %cttz
; AVX: Found an estimated cost of 9 for instruction: %cttz
+; AVX512: Found an estimated cost of 9 for instruction: %cttz
%cttz = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %a, i1 0)
ret <16 x i8> %cttz
}
@@ -208,6 +300,7 @@ define <16 x i8> @var_cttz_v16i8u(<16 x
; SSE2: Found an estimated cost of 13 for instruction: %cttz
; SSE42: Found an estimated cost of 9 for instruction: %cttz
; AVX: Found an estimated cost of 9 for instruction: %cttz
+; AVX512: Found an estimated cost of 9 for instruction: %cttz
%cttz = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %a, i1 1)
ret <16 x i8> %cttz
}
@@ -218,6 +311,7 @@ define <32 x i8> @var_cttz_v32i8(<32 x i
; SSE42: Found an estimated cost of 18 for instruction: %cttz
; AVX1: Found an estimated cost of 20 for instruction: %cttz
; AVX2: Found an estimated cost of 9 for instruction: %cttz
+; AVX512: Found an estimated cost of 9 for instruction: %cttz
%cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 0)
ret <32 x i8> %cttz
}
@@ -228,6 +322,31 @@ define <32 x i8> @var_cttz_v32i8u(<32 x
; SSE42: Found an estimated cost of 18 for instruction: %cttz
; AVX1: Found an estimated cost of 20 for instruction: %cttz
; AVX2: Found an estimated cost of 9 for instruction: %cttz
+; AVX512: Found an estimated cost of 9 for instruction: %cttz
%cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 1)
ret <32 x i8> %cttz
}
+
+define <64 x i8> @var_cttz_v64i8(<64 x i8> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_cttz_v64i8':
+; SSE2: Found an estimated cost of 52 for instruction: %cttz
+; SSE42: Found an estimated cost of 36 for instruction: %cttz
+; AVX1: Found an estimated cost of 40 for instruction: %cttz
+; AVX2: Found an estimated cost of 18 for instruction: %cttz
+; AVX512F: Found an estimated cost of 18 for instruction: %cttz
+; AVX512BW: Found an estimated cost of 9 for instruction: %cttz
+ %cttz = call <64 x i8> @llvm.cttz.v64i8(<64 x i8> %a, i1 0)
+ ret <64 x i8> %cttz
+}
+
+define <64 x i8> @var_cttz_v64i8u(<64 x i8> %a) {
+; CHECK: 'Cost Model Analysis' for function 'var_cttz_v64i8u':
+; SSE2: Found an estimated cost of 52 for instruction: %cttz
+; SSE42: Found an estimated cost of 36 for instruction: %cttz
+; AVX1: Found an estimated cost of 40 for instruction: %cttz
+; AVX2: Found an estimated cost of 18 for instruction: %cttz
+; AVX512F: Found an estimated cost of 18 for instruction: %cttz
+; AVX512BW: Found an estimated cost of 9 for instruction: %cttz
+ %cttz = call <64 x i8> @llvm.cttz.v64i8(<64 x i8> %a, i1 1)
+ ret <64 x i8> %cttz
+}
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