[PATCH] D31516: Separate {Min, Max}AtomicLockFreeWidth from MaxAtomicInlineWidth

[Dan Gohman via Phabricator via llvm-commits]

sunfish added a comment.

If you believe the WebAssembly design is unreasonable, please do file an issue <https://github.com/WebAssembly/threads>. The memory model is just a proposal right now and can be changed.

Otherwise, this is how the platform works. It has 8-bit and 16-bit atomics, and they are not guaranteed lock-free. LLVM's main options seem to be: accept this patch, use 32-bit CAS for all 8-bit and 16-bit atomics in wasm and be inefficient on hardware that does have real 8-bit and 16-bit atomics, or be buggy.


Repository:
  rL LLVM

https://reviews.llvm.org/D31516