[PATCH] D33244: [AMDGPU] Use GCNRPTracker dumper methods in scheduler
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 16 09:45:16 PDT 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL303186: [AMDGPU] Use GCNRPTracker dumper methods in scheduler (authored by rampitec).
Changed prior to commit:
https://reviews.llvm.org/D33244?vs=99160&id=99162#toc
Repository:
rL LLVM
https://reviews.llvm.org/D33244
Files:
llvm/trunk/lib/Target/AMDGPU/GCNRegPressure.cpp
llvm/trunk/lib/Target/AMDGPU/GCNRegPressure.h
llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp
Index: llvm/trunk/lib/Target/AMDGPU/GCNRegPressure.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/GCNRegPressure.cpp
+++ llvm/trunk/lib/Target/AMDGPU/GCNRegPressure.cpp
@@ -451,4 +451,16 @@
return true;
}
+void GCNRPTracker::printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
+ const MachineRegisterInfo &MRI) {
+ const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
+ for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
+ unsigned Reg = TargetRegisterInfo::index2VirtReg(I);
+ auto It = LiveRegs.find(Reg);
+ if (It != LiveRegs.end() && It->second.any())
+ OS << ' ' << PrintVRegOrUnit(Reg, TRI) << ':'
+ << PrintLaneMask(It->second);
+ }
+ OS << '\n';
+}
#endif
Index: llvm/trunk/lib/Target/AMDGPU/GCNRegPressure.h
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/GCNRegPressure.h
+++ llvm/trunk/lib/Target/AMDGPU/GCNRegPressure.h
@@ -116,6 +116,8 @@
decltype(LiveRegs) moveLiveRegs() {
return std::move(LiveRegs);
}
+ static void printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
+ const MachineRegisterInfo &MRI);
};
class GCNUpwardRPTracker : public GCNRPTracker {
Index: llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -337,21 +337,12 @@
if (LIS) {
PressureBefore = Pressure[RegionIdx];
- DEBUG(const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI);
- dbgs() << "Pressure before scheduling:\nRegion live-ins:";
- for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
- unsigned Reg = TargetRegisterInfo::index2VirtReg(I);
- auto It = LiveIns[RegionIdx].find(Reg);
- if (It != LiveIns[RegionIdx].end() && It->second.any())
- dbgs() << ' ' << PrintVRegOrUnit(Reg, SRI) << ':'
- << PrintLaneMask(It->second);
- }
- auto P = llvm::getRegPressure(MRI, LiveIns[RegionIdx]);
- dbgs() << "\nLive-in pressure:\nSGPR = " << P.getSGPRNum()
- << "\nVGPR = " << P.getVGPRNum()
- << "\nReal region's register pressure:\nSGPR = "
- << PressureBefore.getSGPRNum()
- << "\nVGPR = " << PressureBefore.getVGPRNum() << '\n');
+ DEBUG(dbgs() << "Pressure before scheduling:\nRegion live-ins:";
+ GCNRPTracker::printLiveRegs(dbgs(), LiveIns[RegionIdx], MRI);
+ dbgs() << "Region live-in pressure: ";
+ llvm::getRegPressure(MRI, LiveIns[RegionIdx]).print(dbgs());
+ dbgs() << "Region register pressure: ";
+ PressureBefore.print(dbgs()));
}
ScheduleDAGMILive::schedule();
@@ -364,9 +355,7 @@
GCNMaxOccupancySchedStrategy &S = (GCNMaxOccupancySchedStrategy&)*SchedImpl;
auto PressureAfter = getRealRegPressure();
- DEBUG(dbgs() << "Pressure after scheduling:\nSGPR = "
- << PressureAfter.getSGPRNum()
- << "\nVGPR = " << PressureAfter.getVGPRNum() << '\n');
+ DEBUG(dbgs() << "Pressure after scheduling: "; PressureAfter.print(dbgs()));
if (PressureAfter.getSGPRNum() <= S.SGPRCriticalLimit &&
PressureAfter.getVGPRNum() <= S.VGPRCriticalLimit) {
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