[PATCH] D33230: [AArch64] Make instruction fusion more aggressive.

[Evandro Menezes via Phabricator via llvm-commits]

evandro added inline comments.


================
Comment at: lib/Target/AArch64/AArch64MacroFusion.cpp:243
+          continue;
+        DEBUG(dbgs() << "  Copy Succ SU(" << SI->getSUnit()->NodeNum << ")\n");
+        DAG->addEdge(SI->getSUnit(), SDep(&SecondSU, SDep::Artificial));
----------------
You can write this line as:
`DEBUG(dbgs() << "  Copy Succ "; SI->print(dbgs(), DAG); dbgs() << '\n';);`



================
Comment at: lib/Target/AArch64/AArch64TargetMachine.cpp:283
     const AArch64Subtarget &ST = C->MF->getSubtarget<AArch64Subtarget>();
-    if (ST.hasFuseLiterals()) {
+    if (ST.hasFuseLiterals() || ST.hasFuseAES()) {
       // Run the Macro Fusion after RA again since literals are expanded from
----------------
Sorting these methods in alphabetical order would look better.


================
Comment at: test/CodeGen/AArch64/misched-fusion-aes.ll:1
-; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a57 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKA57
-; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a72 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKA72
+; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a57 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKA5A72
+; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-a72 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKA57A72
----------------
Is `CHECKA5A72` a typo?


https://reviews.llvm.org/D33230