[PATCH] D33232: [GlobalISel][X86] G_ADD/G_SUB vector legalizer/selector support.
Igor Breger via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 16 02:13:05 PDT 2017
igorb added inline comments.
================
Comment at: test/CodeGen/X86/GlobalISel/sub-vec.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel < %s -o - | FileCheck %s --check-prefix=SKX
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zvi wrote:
> What SSE2 and AVX2? Should this file be split to 128, 256 and 512?
Hi,
I added select-subv*.mir tests to test instruction selection per ISA set .
I am planing to add RUN with SSE/AVX1/AVX2/ etc to this file after i implement necessary instruction selection ( G_MERGE / G_UNMERGE) and legalization for illegal operations.
https://reviews.llvm.org/D33232
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