[PATCH] D33205: ARM] Fix Neon vector type alignment to 64-bit

[Javed Absar via llvm-commits]

Hi James:


Good point. I am considering the following case -

struct test_struct {


  int a;


  int32x4_t b;


};


clang will currently give it 12 bytes of padding, even though it should have been 4 bytes according to AAPCS.


*** Dumping AST Record Layout


         0 | struct test_struct


         0 |   int a


        16 |   int32x4_t b


           | [sizeof=32, align=16]


Best Regards


Javed



p.s. James, for some reason, you comment does not appear in the phabricator.



________________________________
From: James Molloy <james at jamesmolloy.co.uk>
Sent: 15 May 2017 18:49
To: reviews+D33205+public+7fad182a923fbe49 at reviews.llvm.org; Javed Absar via Phabricator; Javed Absar; diana.picus at linaro.org; renato.golin at linaro.org
Cc: junbuml at codeaurora.org; llvm-commits at lists.llvm.org; kanheim at a-bix.com
Subject: Re: [PATCH] D33205: ARM] Fix Neon vector type alignment to 64-bit

Hi Javed,

Why reduce the preferred alignment from 128? Natural vector alignment means we can more often use the :128 hints on loads and stores.

What's the rationale here?

James
On Mon, 15 May 2017 at 18:10, Javed Absar via Phabricator via llvm-commits <llvm-commits at lists.llvm.org<mailto:llvm-commits at lists.llvm.org>> wrote:
javed.absar created this revision.
Herald added subscribers: srhines, aemerson.

The maximum alignment for ARM NEON data types should be 64-bits as specified in  ARM procedure call standard document Sec. A.2 Notes  [1]. This patch fixes it from its current larger natural default values.

[1] http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042f/IHI0042F_aapcs.pdf


https://reviews.llvm.org/D33205

Files:
  lib/Basic/Targets.cpp
  test/CodeGen/arm-abi-vector.c
  test/CodeGen/arm-neon-misc.c
  test/CodeGen/arm-swiftcall.c
  test/CodeGen/armv7k-abi.c

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