[PATCH] D33117: [AMDGPU] Cache live-ins and register pressure in scheduler

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec updated this revision to Diff 99017.
rampitec added a comment.

Skip debug values when crossing basic block boundary.


Repository:
  rL LLVM

https://reviews.llvm.org/D33117

Files:
  lib/Target/AMDGPU/GCNSchedStrategy.cpp
  lib/Target/AMDGPU/GCNSchedStrategy.h

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