[PATCH] D33076: [PPC] Move the combine "a << (b % (sizeof(a) * 8)) -> (PPCshl a, b)" to the backend. NFC.

[Kyle Butt via Phabricator via llvm-commits]

iteratee added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:12957
+
+// For shift operation op, if it's a vector opeartion,
+// fold (op x, (and y, ((1 << numbits(x)) - 1))) -> (target op x, y)
----------------
That's a typo.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.h:126
+      ///
+      /// For vector types, the actual bits shifted is the modulo result of
+      /// the amount and the element width.
----------------
"For vector types, only the last n bits are used."


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrAltivec.td:990
           (v4i32 (VSLW $vA, $vB))>;
+def : Pat<(v16i8 (PPCshl v16i8:$vA, v16i8:$vB)),
+          (v16i8 (VSLB $vA, $vB))>;
----------------
Can these patterns go in a separate patch? They only seem partially related.


https://reviews.llvm.org/D33076