[PATCH] D33086: [AMDGPU] Fix incorrect register pressure calculation

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 11 10:30:14 PDT 2017


This revision was automatically updated to reflect the committed changes.
Closed by commit rL302812: [AMDGPU] Fix incorrect register pressure calculation (authored by rampitec).

Changed prior to commit:
  https://reviews.llvm.org/D33086?vs=98636&id=98654#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D33086

Files:
  llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp


Index: llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -422,9 +422,10 @@
   unsigned SGPRs = 0;
   unsigned VGPRs = 0;
 
-  auto &MI = *begin()->getParent()->getFirstNonDebugInstr();
+  auto I = begin();
+  I = skipDebugInstructionsForward(I, I->getParent()->end());
   const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI);
-  SlotIndex SI = LIS->getInstructionIndex(MI).getBaseIndex();
+  SlotIndex SI = LIS->getInstructionIndex(*I).getBaseIndex();
   assert (SI.isValid());
 
   DEBUG(dbgs() << "Region live-ins:");


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