[llvm] r302812 - [AMDGPU] Fix incorrect register pressure calculation

[Stanislav Mekhanoshin via llvm-commits]

Author: rampitec
Date: Thu May 11 12:16:55 2017
New Revision: 302812

URL: http://llvm.org/viewvc/llvm-project?rev=302812&view=rev
Log:
[AMDGPU] Fix incorrect register pressure calculation

Earlier fix D32572 introduced a bug where live-ins were calculated
for basic block instead of scheduling region. This change fixes it.

Differential Revision: https://reviews.llvm.org/D33086

Modified:
    llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp?rev=302812&r1=302811&r2=302812&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp Thu May 11 12:16:55 2017
@@ -422,9 +422,10 @@ void GCNScheduleDAGMILive::discoverLiveI
   unsigned SGPRs = 0;
   unsigned VGPRs = 0;
 
-  auto &MI = *begin()->getParent()->getFirstNonDebugInstr();
+  auto I = begin();
+  I = skipDebugInstructionsForward(I, I->getParent()->end());
   const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI);
-  SlotIndex SI = LIS->getInstructionIndex(MI).getBaseIndex();
+  SlotIndex SI = LIS->getInstructionIndex(*I).getBaseIndex();
   assert (SI.isValid());
 
   DEBUG(dbgs() << "Region live-ins:");