[PATCH] D32991: [ELF] Initial migration of AVR target

Leslie Zhai via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 10 21:46:32 PDT 2017


xiangzhai updated this revision to Diff 98581.
xiangzhai added a comment.

Dear Rui,

Sorry to bother you my mentor, but I have some questions:

1. old lld just override the `applyRelocation` function, for example MipsRelocationHandler <https://github.com/avr-llvm/lld/blob/avr-support/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp#L525>, to handle relocation, but NewLLD separate it into `getImplicitAddend` and `relocateOne`?

2. old lld needs the `tgtAddr`, `relAddr`, or `addend` to `calculateRelocation` by special calculation <https://github.com/avr-llvm/lld/blob/avr-support/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp#L149> depending on the kind of `Type`, but NewLLD just simply use `SignExtend64<32>(read32le(Buf))` or some complicated one:

  SignExtend64<20>(((Hi & 0x0400) << 10) | // S                            
                              ((Lo & 0x0800) << 8) |  // J2                           
                              ((Lo & 0x2000) << 5) |  // J1                           
                              ((Hi & 0x003f) << 12) | // imm6                         
                              ((Lo & 0x07ff) << 1));  // imm11:0

I doubt that I might drove in the wrong direction? it should not be simple as my illusion? so I only test `R_AVR_32` at the very beginning.

3. Are there any other bare-bones need to be implemented, for example `handleAVRTlsRelocation` in ELF/Relocations.cpp to produce a minimal executable for AVR?

Regards,
Leslie Zhai


Repository:
  rL LLVM

https://reviews.llvm.org/D32991

Files:
  ELF/InputFiles.cpp
  ELF/Target.cpp
  include/lld/Core/Reference.h


Index: include/lld/Core/Reference.h
===================================================================
--- include/lld/Core/Reference.h
+++ include/lld/Core/Reference.h
@@ -52,7 +52,7 @@
   void setKindNamespace(KindNamespace ns) { _kindNamespace = (uint8_t)ns; }
 
   // Which architecture the kind value is for.
-  enum class KindArch { all, AArch64, ARM, x86, x86_64};
+  enum class KindArch { all, AArch64, ARM, AVR, x86, x86_64};
 
   KindArch kindArch() const { return (KindArch)_kindArch; }
   void setKindArch(KindArch a) { _kindArch = (uint8_t)a; }
Index: ELF/Target.cpp
===================================================================
--- ELF/Target.cpp
+++ ELF/Target.cpp
@@ -247,6 +247,15 @@
   void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
   bool usesOnlyLowPageBits(uint32_t Type) const override;
 };
+
+class AVRTargetInfo final : public TargetInfo {
+public:
+  AVRTargetInfo();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
+                     const uint8_t *Loc) const override;
+  int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+};
 } // anonymous namespace
 
 TargetInfo *createTarget() {
@@ -281,6 +290,8 @@
     if (Config->EKind == ELF32LEKind)
       return make<X86_64TargetInfo<ELF32LE>>();
     return make<X86_64TargetInfo<ELF64LE>>();
+  case EM_AVR:
+    return make<AVRTargetInfo>();
   }
   fatal("unknown target machine");
 }
@@ -2400,5 +2411,34 @@
 bool MipsTargetInfo<ELFT>::usesOnlyLowPageBits(uint32_t Type) const {
   return Type == R_MIPS_LO16 || Type == R_MIPS_GOT_OFST;
 }
+
+AVRTargetInfo::AVRTargetInfo() {
+}
+
+RelExpr AVRTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S,
+                                  const uint8_t *Loc) const {
+  return R_NONE;
+}
+
+int64_t AVRTargetInfo::getImplicitAddend(const uint8_t *Buf,
+                                         uint32_t Type) const {
+  switch (Type) {
+  default:
+    return 0;
+  case R_AVR_32:
+    return SignExtend64<32>(read32le(Buf));
+  }
+}
+
+void AVRTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
+                                uint64_t Val) const {
+  switch (Type) {
+  case R_AVR_32:
+    write32le(Loc, Val);
+    break;
+  default:
+    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
+  }
+}
 }
 }
Index: ELF/InputFiles.cpp
===================================================================
--- ELF/InputFiles.cpp
+++ ELF/InputFiles.cpp
@@ -803,6 +803,8 @@
     return T.isOSIAMCU() ? EM_IAMCU : EM_386;
   case Triple::x86_64:
     return EM_X86_64;
+  case Triple::avr:
+    return EM_AVR;
   default:
     fatal(Path + ": could not infer e_machine from bitcode target triple " +
           T.str());


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