[PATCH] D32999: [UnreachableBlockElim] Check return value of constrainRegClass().

[Mikael Holmén via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL302622: [UnreachableBlockElim] Check return value of constrainRegClass(). (authored by uabelho).

Changed prior to commit:
  https://reviews.llvm.org/D32999?vs=98400&id=98404#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D32999

Files:
  llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp


Index: llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp
+++ llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp
@@ -206,11 +206,12 @@
         if (InputReg != OutputReg) {
           MachineRegisterInfo &MRI = F.getRegInfo();
           unsigned InputSub = Input.getSubReg();
-          if (InputSub == 0) {
-            MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg));
+          if (InputSub == 0 &&
+              MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg))) {
             MRI.replaceRegWith(OutputReg, InputReg);
           } else {
-            // The input register to the PHI has a subregister:
+            // The input register to the PHI has a subregister or it can't be
+            // constrained to the proper register class:
             // insert a COPY instead of simply replacing the output
             // with the input.
             const TargetInstrInfo *TII = F.getSubtarget().getInstrInfo();


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