[llvm] r302585 - [InstCombine] update test file to use FileCheck; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Tue May  9 15:46:12 2017
New Revision: 302585

URL: http://llvm.org/viewvc/llvm-project?rev=302585&view=rev
Log:
[InstCombine] update test file to use FileCheck; NFC

Modified:
    llvm/trunk/test/Transforms/InstCombine/bit-tracking.ll

Modified: llvm/trunk/test/Transforms/InstCombine/bit-tracking.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bit-tracking.ll?rev=302585&r1=302584&r2=302585&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/bit-tracking.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/bit-tracking.ll Tue May  9 15:46:12 2017
@@ -1,26 +1,34 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
 ; This file contains various testcases that require tracking whether bits are
 ; set or cleared by various instructions.
-; RUN: opt < %s -instcombine -instcombine -S |\
-; RUN:   not grep %ELIM
 
 ; Reduce down to a single XOR
 define i32 @test3(i32 %B) {
-        %ELIMinc = and i32 %B, 1                ; <i32> [#uses=1]
-        %tmp.5 = xor i32 %ELIMinc, 1            ; <i32> [#uses=1]
-        %ELIM7 = and i32 %B, -2         ; <i32> [#uses=1]
-        %tmp.8 = or i32 %tmp.5, %ELIM7          ; <i32> [#uses=1]
-        ret i32 %tmp.8
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:    [[TMP_8:%.*]] = xor i32 %B, 1
+; CHECK-NEXT:    ret i32 [[TMP_8]]
+;
+  %ELIMinc = and i32 %B, 1
+  %tmp.5 = xor i32 %ELIMinc, 1
+  %ELIM7 = and i32 %B, -2
+  %tmp.8 = or i32 %tmp.5, %ELIM7
+  ret i32 %tmp.8
 }
 
 ; Finally, a bigger case where we chain things together.  This corresponds to
 ; incrementing a single-bit bitfield, which should become just an xor.
 define i32 @test4(i32 %B) {
-        %ELIM3 = shl i32 %B, 31         ; <i32> [#uses=1]
-        %ELIM4 = ashr i32 %ELIM3, 31            ; <i32> [#uses=1]
-        %inc = add i32 %ELIM4, 1                ; <i32> [#uses=1]
-        %ELIM5 = and i32 %inc, 1                ; <i32> [#uses=1]
-        %ELIM7 = and i32 %B, -2         ; <i32> [#uses=1]
-        %tmp.8 = or i32 %ELIM5, %ELIM7          ; <i32> [#uses=1]
-        ret i32 %tmp.8
+; CHECK-LABEL: @test4(
+; CHECK-NEXT:    [[TMP_8:%.*]] = xor i32 %B, 1
+; CHECK-NEXT:    ret i32 [[TMP_8]]
+;
+  %ELIM3 = shl i32 %B, 31
+  %ELIM4 = ashr i32 %ELIM3, 31
+  %inc = add i32 %ELIM4, 1
+  %ELIM5 = and i32 %inc, 1
+  %ELIM7 = and i32 %B, -2
+  %tmp.8 = or i32 %ELIM5, %ELIM7
+  ret i32 %tmp.8
 }