[PATCH] D32802: Add checks so that -pre-RA-sched=list-ilp does not crash on SystemZ (Bug 32723).
Andrew Trick via llvm-commits
llvm-commits at lists.llvm.org
Tue May 9 09:48:09 PDT 2017
From your patch, it looks to me like some ancient unsupported register pressure API. Targets should have moved to source-order SelectionDAG scheduling by now. I don’t think you need to update the code to handle Untyped values. The test cases changes might be incidental.
-Andy
> On May 9, 2017, at 9:43 AM, Jonas Paulsson via Phabricator <reviews at reviews.llvm.org> wrote:
>
> jonpa requested review of this revision.
> jonpa added a comment.
>
> Hi Andy,
>
> thanks for taking a look!
>
> I ran the regression tests before committing, and found to my surprise that two tests had now changed:
>
> test/CodeGen/Mips/divrem.ll
> test/CodeGen/Mips/llvm-ir/mul.ll
>
> I thought this was just SystemZ that was lagging a bit, but it seems that Mips also has Untyped values, while also having a untyped register class (ACC64DSP). This means that the register pressure heuristics actually was in use for Untyped...
>
> Now I am not sure anymore what to do. Is it reasonable to update the tests on Mips with the new output? Or should register pressure be correct also for Untyped? What I saw so far was minor changes not causing any spilling or so, just some reordering, like:
>
> TRUNK: W/ PATCH:
> sdivrem1: # @sdivrem1 sdivrem1: # @sdivrem1
> .frame $sp,0,$ra .frame $sp,0,$ra
> .mask 0x00000000,0 .mask 0x00000000,0
> .fmask 0x00000000,0 .fmask 0x00000000,0
> .set noreorder .set noreorder
> .set nomacro .set nomacro
> .set noat .set noat
> # BB#0: # %entry # BB#0: # %entry
> div $zero, $4, $5 div $zero, $4, $5
> teq $5, $zero, 7 teq $5, $zero, 7
> mflo $2 <
> mfhi $1 mfhi $1
> jr $ra <
> sw $1, 0($6) sw $1, 0($6)
>> jr $ra
>> mflo $2
> .set at .set at
> .set macro .set macro
> .set reorder .set reorder
> .end sdivrem1 .end sdivrem1
>
> udivrem1: # @udivrem1 udivrem1: # @udivrem1
> .frame $sp,0,$ra .frame $sp,0,$ra
> .mask 0x00000000,0 .mask 0x00000000,0
> .fmask 0x00000000,0 .fmask 0x00000000,0
> .set noreorder .set noreorder
> .set nomacro .set nomacro
> .set noat .set noat
> # BB#0: # %entry # BB#0: # %entry
> divu $zero, $4, $5 divu $zero, $4, $5
> teq $5, $zero, 7 teq $5, $zero, 7
> mflo $2 <
> mfhi $1 mfhi $1
> jr $ra <
> sw $1, 0($6) sw $1, 0($6)
>> jr $ra
>> mflo $2
> .set at .set at
> .set macro .set macro
> .set reorder .set reorder
> .end udivrem1 .end udivrem1
>
> I of course tried to use
>
> ./utils/update_llc_test_checks.py ./test/CodeGen/Mips/llvm-ir/mul.ll
>
> but got
>
> Cannot find a triple. Assume 'x86'
> Cannot find a triple. Assume 'x86'
> WARNING: Found conflicting asm under the same prefix: 'GP32'!
> WARNING: Found conflicting asm under the same prefix: 'GP32'!
> WARNING: Found conflicting asm under the same prefix: 'GP32'!
> WARNING: Found conflicting asm under the same prefix: 'GP32'!
> WARNING: Found conflicting asm under the same prefix: 'GP32'!
> Cannot find a triple. Assume 'x86'
> WARNING: Found conflicting asm under the same prefix: 'GP32'!
> WARNING: Found conflicting asm under the same prefix: 'GP32'!
> Cannot find a triple. Assume 'x86'
> Cannot find a triple. Assume 'x86'
> Cannot find a triple. Assume 'x86'
> WARNING: Found conflicting asm under the same prefix: 'GP32'!
> WARNING: Found conflicting asm under the same prefix: 'GP32'!
> Cannot find a triple. Assume 'x86'
> Cannot find a triple. Assume 'x86'
> WARNING: Found conflicting asm under the same prefix: 'GP64-NOT-R6'!
> WARNING: Found conflicting asm under the same prefix: 'GP64-NOT-R6'!
> WARNING: Found conflicting asm under the same prefix: 'GP64-NOT-R6'!
> WARNING: Found conflicting asm under the same prefix: 'GP64-NOT-R6'!
> Cannot find a triple. Assume 'x86'
> WARNING: Found conflicting asm under the same prefix: 'GP64-NOT-R6'!
> WARNING: Found conflicting asm under the same prefix: 'GP64-NOT-R6'!
> Cannot find a triple. Assume 'x86'
> Cannot find a triple. Assume 'x86'
> Cannot find a triple. Assume 'x86'
> Cannot find a triple. Assume 'x86'
> Cannot find a triple. Assume 'x86'
> Cannot find a triple. Assume 'x86'
>
> The script was obviously not working, because the updated test also failed.
>
> Should I aim to update the tests, or should I instead go though the work of adding an untyped regclass the same way Mips does it? (This would be a temporary solution, as in fact the best solution would be to avoid the Untyped and make i128 a legal type).
>
>
> https://reviews.llvm.org/D32802
>
>
>
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