[PATCH] D32394: Add extra operand to CALLSEQ_START to keep frame part set up previously

[Serge Pavlov via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL302527: Add extra operand to CALLSEQ_START to keep frame part set up previously (authored by sepavloff).

Changed prior to commit:
  https://reviews.llvm.org/D32394?vs=97461&id=98277#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D32394

Files:
  llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
  llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
  llvm/trunk/include/llvm/Target/TargetInstrInfo.h
  llvm/trunk/include/llvm/Target/TargetSelectionDAG.td
  llvm/trunk/lib/CodeGen/MachineVerifier.cpp
  llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
  llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cpp
  llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp
  llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
  llvm/trunk/lib/Target/ARM/ARMCallLowering.cpp
  llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
  llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
  llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
  llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
  llvm/trunk/lib/Target/AVR/AVRFrameLowering.cpp
  llvm/trunk/lib/Target/AVR/AVRISelLowering.cpp
  llvm/trunk/lib/Target/AVR/AVRInstrInfo.td
  llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp
  llvm/trunk/lib/Target/BPF/BPFInstrInfo.td
  llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonPatterns.td
  llvm/trunk/lib/Target/Hexagon/HexagonPseudo.td
  llvm/trunk/lib/Target/Lanai/LanaiISelLowering.cpp
  llvm/trunk/lib/Target/Lanai/LanaiInstrInfo.td
  llvm/trunk/lib/Target/MSP430/MSP430FrameLowering.cpp
  llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
  llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.h
  llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td
  llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
  llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
  llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
  llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp
  llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.td
  llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
  llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
  llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
  llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td
  llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
  llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
  llvm/trunk/lib/Target/SystemZ/SystemZOperators.td
  llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrCall.td
  llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
  llvm/trunk/lib/Target/X86/X86FastISel.cpp
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/lib/Target/X86/X86InstrCompiler.td
  llvm/trunk/lib/Target/X86/X86InstrInfo.h
  llvm/trunk/lib/Target/X86/X86InstrInfo.td
  llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
  llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td
  llvm/trunk/test/CodeGen/AArch64/GlobalISel/call-translator.ll
  llvm/trunk/test/CodeGen/AArch64/stackmap-frame-setup.ll
  llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
  llvm/trunk/test/CodeGen/Hexagon/regalloc-bad-undef.mir
  llvm/trunk/test/CodeGen/Lanai/peephole-compare.mir
  llvm/trunk/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
  llvm/trunk/test/CodeGen/PowerPC/stackmap-frame-setup.ll
  llvm/trunk/test/CodeGen/X86/stackmap-frame-setup.ll

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