[llvm] r302452 - [AArch64][RegisterBankInfo] Fix mapping cost for GPR.

[Quentin Colombet via llvm-commits]

Author: qcolombet
Date: Mon May  8 13:16:23 2017
New Revision: 302452

URL: http://llvm.org/viewvc/llvm-project?rev=302452&view=rev
Log:
[AArch64][RegisterBankInfo] Fix mapping cost for GPR.

In r292478, we changed the order of the enum that is referenced by
PMI_FirstXXX. This had the side effect of changing the cost of the
mapping of all the loads, instead of just the FPRs ones.

Reinstate the higher cost for all but GPR loads.
Note: This did not have any external visible effects:
- For Fast mode, the cost would have been higher, but we don't care
  because we don't try to use alternative mappings.
- For Greedy mode, the higher cost of the GPR loads, would have
  triggered the use of the supposedly alternative mapping, that
  would be in fact the same GPR mapping but with a lower cost.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp?rev=302452&r1=302451&r2=302452&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp Mon May  8 13:16:23 2017
@@ -529,7 +529,7 @@ AArch64RegisterBankInfo::getInstrMapping
     // for the greedy mode the cost of the cross bank copy will
     // offset this number.
     // FIXME: Should be derived from the scheduling model.
-    if (OpRegBankIdx[0] >= PMI_FirstFPR)
+    if (OpRegBankIdx[0] != PMI_FirstGPR)
       Cost = 2;
     break;
   }