[PATCH] D31965: [SLP] Enable 64-bit wide vectorization for Cyclone

[Kristof Beyls via Phabricator via llvm-commits]

kristof.beyls added a comment.

In https://reviews.llvm.org/D31965#743954, @anemet wrote:

> Hey Matt,
>
> In https://reviews.llvm.org/D31965#742295, @mssimpso wrote:
>
> > Hi Adam,
> >
> > I'm not sure where the conversation about this patch landed, but I'm fine with it being a Cyclone only change for now if that's what you prefer. I haven't had a chance to evaluate it on our cores yet. But when I do, I can easily set MinVectorRegisterBitWith if there's any benefit. How does compile-time look?
>
>
> There is no measurable compile-time change for AArch64 (testsuite, ctmark, spec).
>
> I believe the idea was to try to enable this for all subtargets, assuming you and @evandro can test this.  On the other hand, it's been almost a month and I'd like to wrap this up.  So perhaps we should enable this for Cyclone and A57 for now and then perhaps file bugs for the remaining subtargets to evaluate this.
>
> How does that sound, @rengolin and others?


That sounds reasonable to me, but I would do it the other way around: enable it by default and explicitly disable it for the cores that we know have a chance of being evaluated and decided on later.
Otherwise, I'm afraid that we'll forever have an ever-growing whitelist of cores to enable this on, while it looks like the right thing to do in the end is to just enable it by default.


https://reviews.llvm.org/D31965