[PATCH] D32391: [SelectionDAG] Improve support for promotion of <1 x fX> floating point argument types (PR31088)

[Artem Belevich via Phabricator via llvm-commits]

tra added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:532
   if (Res.getValueType() != VT)
-    Res = DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), VT, Res);
+    Res = VT.isInteger() ? DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), VT, Res)
+                         : DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Res);
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Nit. I'd use VT.isFloatingPoint() and use FP_EXTEND only on types we positively know to be FP and leave behavior for all other types as it is right now. Otherwise you're making implicit assumption that all types are either integer or FP which, generally speaking, is not true. There's void, for instance.



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Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:367
   if (ValueVT.getVectorNumElements() == 1 && ValueSVT != PartEVT)
-    Val = DAG.getAnyExtOrTrunc(Val, DL, ValueSVT);
+    Val = ValueVT.isInteger() ? DAG.getAnyExtOrTrunc(Val, DL, ValueSVT)
+                              : DAG.getFPExtendOrRound(Val, DL, ValueSVT);
----------------
Same as above.


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Comment at: test/CodeGen/X86/pr31088.ll:2-3
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c | FileCheck %s --check-prefix=F16C
----------------
RKSimon wrote:
> spatel wrote:
> > Does having both SSE and AVX RUNs add value? Seems like the output is identical apart from 'v' prefixes, so I'd kill one of them just as a matter of saving test time.
> OK - I'll keep SSE. I'll add i686 targets instead as they will be coming from the stack instead of registers so will show another behaviour
It may be interesting to run the tests for NVPTX target as it supports both native FP16 and promote-to-fp32-calcualate->demote back to fp16 codegen modes.


Repository:
  rL LLVM

https://reviews.llvm.org/D32391