[polly] r301689 - [tests] Ensure all test cases use named variables

Tobias Grosser via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 28 14:16:30 PDT 2017


Author: grosser
Date: Fri Apr 28 16:16:29 2017
New Revision: 301689

URL: http://llvm.org/viewvc/llvm-project?rev=301689&view=rev
Log:
[tests] Ensure all test cases use named variables

This makes it easier to read and possibly even modify the test cases, as there
is no need to keep the variable increment in steps of one. More importantly, by
using explicit variable names we do not need to rely on the implicit numbering
of statements when dumping the scop information.

This makes it easier to read and possibly even modify the test cases.
Furthermore, by using explicit variables we do not need to rely on the implicit
numbering of statements when dumping the scop information. In a future commit,
this implicit numbering will likely not be used any more to refer to LLVM-IR
values as it is very expensive to construct.

Modified:
    polly/trunk/test/Isl/CodeGen/loop_with_condition.ll
    polly/trunk/test/Isl/CodeGen/loop_with_condition_ineq.ll
    polly/trunk/test/Isl/CodeGen/loop_with_condition_nested.ll
    polly/trunk/test/Isl/CodeGen/unpredictable-loop-unsynthesizable.ll
    polly/trunk/test/ScopInfo/aliasing_with_non_affine_access.ll
    polly/trunk/test/ScopInfo/invariant-loads-leave-read-only-statements.ll
    polly/trunk/test/ScopInfo/loop_carry.ll
    polly/trunk/test/ScopInfo/parameter-constant-division.ll

Modified: polly/trunk/test/Isl/CodeGen/loop_with_condition.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/loop_with_condition.ll?rev=301689&r1=301688&r2=301689&view=diff
==============================================================================
--- polly/trunk/test/Isl/CodeGen/loop_with_condition.ll (original)
+++ polly/trunk/test/Isl/CodeGen/loop_with_condition.ll Fri Apr 28 16:16:29 2017
@@ -45,39 +45,39 @@ target datalayout = "e-p:64:64:64-i1:8:8
 @B = common global [1024 x i32] zeroinitializer, align 16 ; <[1024 x i32]*> [#uses=4]
 
 define void @loop_with_condition() nounwind {
-; <label>:0
+bb0:
   fence seq_cst
-  br label %1
+  br label %bb1
 
-; <label>:1                                       ; preds = %7, %0
-  %indvar = phi i64 [ %indvar.next, %7 ], [ 0, %0 ] ; <i64> [#uses=5]
+bb1:
+  %indvar = phi i64 [ %indvar.next, %bb7 ], [ 0, %bb0 ] ; <i64> [#uses=5]
   %scevgep = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %indvar ; <i32*> [#uses=2]
   %scevgep1 = getelementptr [1024 x i32], [1024 x i32]* @B, i64 0, i64 %indvar ; <i32*> [#uses=1]
   %i.0 = trunc i64 %indvar to i32                 ; <i32> [#uses=1]
   %exitcond = icmp ne i64 %indvar, 1024           ; <i1> [#uses=1]
-  br i1 %exitcond, label %2, label %8
+  br i1 %exitcond, label %bb2, label %bb8
 
-; <label>:2                                       ; preds = %1
-  %3 = icmp sle i32 %i.0, 512                     ; <i1> [#uses=1]
-  br i1 %3, label %4, label %5
+bb2:
+  %var3 = icmp sle i32 %i.0, 512                     ; <i1> [#uses=1]
+  br i1 %var3, label %bb4, label %bb5
 
-; <label>:4                                       ; preds = %2
+bb4:
   store i32 1, i32* %scevgep
-  br label %6
+  br label %bb6
 
-; <label>:5                                       ; preds = %2
+bb5:
   store i32 2, i32* %scevgep
-  br label %6
+  br label %bb6
 
-; <label>:6                                       ; preds = %5, %4
+bb6:
   store i32 3, i32* %scevgep1
-  br label %7
+  br label %bb7
 
-; <label>:7                                       ; preds = %6
+bb7:
   %indvar.next = add i64 %indvar, 1               ; <i64> [#uses=1]
-  br label %1
+  br label %bb1
 
-; <label>:8                                       ; preds = %1
+bb8:
   fence seq_cst
   ret void
 }
@@ -167,8 +167,8 @@ declare void @llvm.memset.p0i8.i64(i8* n
 
 ; CHECK: for (int c0 = 0; c0 <= 1023; c0 += 1) {
 ; CHECK:   if (c0 >= 513) {
-; CHECK:     Stmt_5(c0);
+; CHECK:     Stmt_bb5(c0);
 ; CHECK:   } else
-; CHECK:     Stmt_4(c0);
-; CHECK:   Stmt_6(c0);
+; CHECK:     Stmt_bb4(c0);
+; CHECK:   Stmt_bb6(c0)
 ; CHECK: }

Modified: polly/trunk/test/Isl/CodeGen/loop_with_condition_ineq.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/loop_with_condition_ineq.ll?rev=301689&r1=301688&r2=301689&view=diff
==============================================================================
--- polly/trunk/test/Isl/CodeGen/loop_with_condition_ineq.ll (original)
+++ polly/trunk/test/Isl/CodeGen/loop_with_condition_ineq.ll Fri Apr 28 16:16:29 2017
@@ -45,39 +45,39 @@ target datalayout = "e-p:64:64:64-i1:8:8
 @B = common global [1024 x i32] zeroinitializer, align 16 ; <[1024 x i32]*> [#uses=4]
 
 define void @loop_with_condition_ineq() nounwind {
-; <label>:0
+bb0:
   fence seq_cst
-  br label %1
+  br label %bb1
 
-; <label>:1                                       ; preds = %7, %0
-  %indvar = phi i64 [ %indvar.next, %7 ], [ 0, %0 ] ; <i64> [#uses=5]
+bb1:
+  %indvar = phi i64 [ %indvar.next, %bb7 ], [ 0, %bb0 ] ; <i64> [#uses=5]
   %scevgep = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %indvar ; <i32*> [#uses=2]
   %scevgep1 = getelementptr [1024 x i32], [1024 x i32]* @B, i64 0, i64 %indvar ; <i32*> [#uses=1]
   %i.0 = trunc i64 %indvar to i32                 ; <i32> [#uses=1]
   %exitcond = icmp ne i64 %indvar, 1024           ; <i1> [#uses=1]
-  br i1 %exitcond, label %2, label %8
+  br i1 %exitcond, label %bb2, label %bb8
 
-; <label>:2                                       ; preds = %1
-  %3 = icmp ne i32 %i.0, 512                      ; <i1> [#uses=1]
-  br i1 %3, label %4, label %5
+bb2:
+  %var3 = icmp ne i32 %i.0, 512                      ; <i1> [#uses=1]
+  br i1 %var3, label %bb4, label %bb5
 
-; <label>:4                                       ; preds = %2
+bb4:
   store i32 1, i32* %scevgep
-  br label %6
+  br label %bb6
 
-; <label>:5                                       ; preds = %2
+bb5:
   store i32 2, i32* %scevgep
-  br label %6
+  br label %bb6
 
-; <label>:6                                       ; preds = %5, %4
+bb6:
   store i32 3, i32* %scevgep1
-  br label %7
+  br label %bb7
 
-; <label>:7                                       ; preds = %6
+bb7:
   %indvar.next = add i64 %indvar, 1               ; <i64> [#uses=1]
-  br label %1
+  br label %bb1
 
-; <label>:8                                       ; preds = %1
+bb8:
   fence seq_cst
   ret void
 }
@@ -167,8 +167,8 @@ declare void @llvm.memset.p0i8.i64(i8* n
 
 ; CHECK: for (int c0 = 0; c0 <= 1023; c0 += 1) {
 ; CHECK:   if (c0 == 512) {
-; CHECK:     Stmt_5(512);
+; CHECK:     Stmt_bb5(512);
 ; CHECK:   } else
-; CHECK:     Stmt_4(c0);
-; CHECK:   Stmt_6(c0);
+; CHECK:     Stmt_bb4(c0);
+; CHECK:   Stmt_bb6(c0);
 ; CHECK: }

Modified: polly/trunk/test/Isl/CodeGen/loop_with_condition_nested.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/loop_with_condition_nested.ll?rev=301689&r1=301688&r2=301689&view=diff
==============================================================================
--- polly/trunk/test/Isl/CodeGen/loop_with_condition_nested.ll (original)
+++ polly/trunk/test/Isl/CodeGen/loop_with_condition_nested.ll Fri Apr 28 16:16:29 2017
@@ -53,46 +53,46 @@ target datalayout = "e-p:64:64:64-i1:8:8
 @B = common global [1024 x i32] zeroinitializer, align 16 ; <[1024 x i32]*> [#uses=4]
 
 define void @loop_with_condition() nounwind {
-; <label>:0
+bb0:
   fence seq_cst
-  br label %1
+  br label %bb1
 
-; <label>:1                                       ; preds = %10, %0
-  %indvar = phi i64 [ %indvar.next, %10 ], [ 0, %0 ] ; <i64> [#uses=5]
+bb1:
+  %indvar = phi i64 [ %indvar.next, %bb10 ], [ 0, %bb0 ] ; <i64> [#uses=5]
   %scevgep = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %indvar ; <i32*> [#uses=2]
   %scevgep1 = getelementptr [1024 x i32], [1024 x i32]* @B, i64 0, i64 %indvar ; <i32*> [#uses=1]
   %i.0 = trunc i64 %indvar to i32                 ; <i32> [#uses=2]
   %exitcond = icmp ne i64 %indvar, 1024           ; <i1> [#uses=1]
-  br i1 %exitcond, label %2, label %11
+  br i1 %exitcond, label %bb2, label %bb11
 
-; <label>:2                                       ; preds = %1
-  %3 = icmp sle i32 %i.0, 512                     ; <i1> [#uses=1]
-  br i1 %3, label %4, label %9
+bb2:
+  %var3 = icmp sle i32 %i.0, 512                     ; <i1> [#uses=1]
+  br i1 %var3, label %bb4, label %bb9
 
-; <label>:4                                       ; preds = %2
-  %5 = icmp sgt i32 %i.0, 20                      ; <i1> [#uses=1]
-  br i1 %5, label %6, label %7
+bb4:
+  %var5 = icmp sgt i32 %i.0, 20                      ; <i1> [#uses=1]
+  br i1 %var5, label %bb6, label %bb7
 
-; <label>:6                                       ; preds = %4
+bb6:
   store i32 1, i32* %scevgep
-  br label %8
+  br label %bb8
 
-; <label>:7                                       ; preds = %4
+bb7:
   store i32 2, i32* %scevgep
-  br label %8
+  br label %bb8
 
-; <label>:8                                       ; preds = %7, %6
-  br label %9
+bb8:
+  br label %bb9
 
-; <label>:9                                       ; preds = %8, %2
+bb9:
   store i32 3, i32* %scevgep1
-  br label %10
+  br label %bb10
 
-; <label>:10                                      ; preds = %9
+bb10:
   %indvar.next = add i64 %indvar, 1               ; <i64> [#uses=1]
-  br label %1
+  br label %bb1
 
-; <label>:11                                      ; preds = %1
+bb11:
   fence seq_cst
   ret void
 }
@@ -205,13 +205,12 @@ declare void @llvm.memset.p0i8.i64(i8* n
 
 ; CHECK: for (int c0 = 0; c0 <= 1023; c0 += 1) {
 ; CHECK:   if (c0 <= 20) {
-; CHECK:     Stmt_7(c0);
+; CHECK:     Stmt_bb7(c0);
 ; CHECK:   } else if (c0 <= 512)
-; CHECK:     Stmt_6(c0);
-; CHECK:   Stmt_9(c0);
+; CHECK:     Stmt_bb6(c0);
+; CHECK:   Stmt_bb9(c0);
 ; CHECK: }
 
 ; LOOPS: Printing analysis 'Natural Loop Information' for function 'loop_with_condition':
-; LOOPS: Loop at depth 1 containing: %1<header><exiting>,%2,%4,%7,%6,%8,%9,%10<latch>
-; LOOPS: Loop at depth 1 containing:
-; LOOPS: %polly.loop_header<header>,%polly.cond,%polly.merge,%polly.then,%polly.else,%polly.stmt.,%polly.cond3,%polly.merge4,%polly.then5,%polly.else6,%polly.stmt.7,%polly.stmt{{.*}}<latch><exiting>
+; LOOPS: Loop at depth 1 containing: %bb1<header><exiting>,%bb2,%bb4,%bb7,%bb6,%bb8,%bb9,%bb10<latch>
+; LOOPS: Loop at depth 1 containing: %polly.loop_header<header>,%polly.cond,%polly.merge,%polly.then,%polly.else,%polly.stmt.bb7,%polly.cond3,%polly.merge4,%polly.then5,%polly.else6,%polly.stmt.bb6,%polly.stmt.bb9<latch><exiting>

Modified: polly/trunk/test/Isl/CodeGen/unpredictable-loop-unsynthesizable.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/unpredictable-loop-unsynthesizable.ll?rev=301689&r1=301688&r2=301689&view=diff
==============================================================================
--- polly/trunk/test/Isl/CodeGen/unpredictable-loop-unsynthesizable.ll (original)
+++ polly/trunk/test/Isl/CodeGen/unpredictable-loop-unsynthesizable.ll Fri Apr 28 16:16:29 2017
@@ -27,11 +27,11 @@ for.body:
   br i1 %cmp6, label %for.body, label %for.end.loopexit
 
 for.end.loopexit:
-  %1 = trunc i64 %indvars.iv.next29 to i32
+  %var1 = trunc i64 %indvars.iv.next29 to i32
   br label %cleanup
 
 cleanup:
-  %retval.0 = phi i32 [ 0, %entry ], [ %1, %for.end.loopexit ]
+  %retval.0 = phi i32 [ 0, %entry ], [ %var1, %for.end.loopexit ]
   ret i32 %retval.0
 }
 
@@ -57,5 +57,5 @@ cleanup:
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:             [p_0_loaded_from_bs] -> { Stmt_for_end_loopexit[] -> MemRef_indvars_iv_next29[] };
 ; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:             [p_0_loaded_from_bs] -> { Stmt_for_end_loopexit[] -> MemRef_1[] };
+; CHECK-NEXT:             [p_0_loaded_from_bs] -> { Stmt_for_end_loopexit[] -> MemRef_var1[] };
 ; CHECK-NEXT: }

Modified: polly/trunk/test/ScopInfo/aliasing_with_non_affine_access.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/ScopInfo/aliasing_with_non_affine_access.ll?rev=301689&r1=301688&r2=301689&view=diff
==============================================================================
--- polly/trunk/test/ScopInfo/aliasing_with_non_affine_access.ll (original)
+++ polly/trunk/test/ScopInfo/aliasing_with_non_affine_access.ll Fri Apr 28 16:16:29 2017
@@ -2,11 +2,11 @@
 ;
 ; @test1
 ; Make sure we generate the correct aliasing check for a fixed-size memset operation.
-; CHECK: if (1 && (&MemRef_0[15] <= &MemRef_1[0] || &MemRef_1[32] <= &MemRef_0[14]))
+; CHECK: if (1 && (&MemRef_tmp0[15] <= &MemRef_tmp1[0] || &MemRef_tmp1[32] <= &MemRef_tmp0[14]))
 ;
 ; @test2
 ; Make sure we generate the correct aliasing check for a variable-size memset operation.
-; CHECK: if (1 && (&MemRef_0[15] <= &MemRef_1[0] || &MemRef_1[n] <= &MemRef_0[14]))
+; CHECK: if (1 && (&MemRef_tmp0[15] <= &MemRef_tmp1[0] || &MemRef_tmp1[n] <= &MemRef_tmp0[14]))
 ;
 ; @test3
 ; We can't do anything interesting with a non-affine memset; just make sure it doesn't crash.
@@ -22,18 +22,18 @@ declare void @llvm.memset.p0i8.i64(i8* n
 
 define void @test1(%struct.info** %ppIdxInfo) {
 entry:
-  %0 = load %struct.info*, %struct.info** %ppIdxInfo, align 8
+  %tmp0 = load %struct.info*, %struct.info** %ppIdxInfo, align 8
   br label %if.end125
 
 if.end125:                                        ; preds = %entry
-  %1 = load %struct.ctr*, %struct.ctr** undef, align 8
+  %tmp1 = load %struct.ctr*, %struct.ctr** undef, align 8
   br label %for.end143
 
 for.end143:                                       ; preds = %if.end125
-  %2 = bitcast %struct.ctr* %1 to i8*
-  tail call void @llvm.memset.p0i8.i64(i8* %2, i8 0, i64 32, i32 4, i1 false)
-  %needToFreeIdxStr = getelementptr inbounds %struct.info, %struct.info* %0, i64 0, i32 7
-  %3 = load i32, i32* %needToFreeIdxStr, align 8
+  %tmp2 = bitcast %struct.ctr* %tmp1 to i8*
+  tail call void @llvm.memset.p0i8.i64(i8* %tmp2, i8 0, i64 32, i32 4, i1 false)
+  %needToFreeIdxStr = getelementptr inbounds %struct.info, %struct.info* %tmp0, i64 0, i32 7
+  %tmp3 = load i32, i32* %needToFreeIdxStr, align 8
   br i1 false, label %if.end149, label %if.then148
 
 if.then148:                                       ; preds = %for.end143
@@ -45,18 +45,18 @@ if.end149:
 
 define void @test2(%struct.info** %ppIdxInfo, i64 %n) {
 entry:
-  %0 = load %struct.info*, %struct.info** %ppIdxInfo, align 8
+  %tmp0 = load %struct.info*, %struct.info** %ppIdxInfo, align 8
   br label %if.end125
 
 if.end125:                                        ; preds = %entry
-  %1 = load %struct.ctr*, %struct.ctr** undef, align 8
+  %tmp1 = load %struct.ctr*, %struct.ctr** undef, align 8
   br label %for.end143
 
 for.end143:                                       ; preds = %if.end125
-  %2 = bitcast %struct.ctr* %1 to i8*
-  tail call void @llvm.memset.p0i8.i64(i8* %2, i8 0, i64 %n, i32 4, i1 false)
-  %needToFreeIdxStr = getelementptr inbounds %struct.info, %struct.info* %0, i64 0, i32 7
-  %3 = load i32, i32* %needToFreeIdxStr, align 8
+  %tmp2 = bitcast %struct.ctr* %tmp1 to i8*
+  tail call void @llvm.memset.p0i8.i64(i8* %tmp2, i8 0, i64 %n, i32 4, i1 false)
+  %needToFreeIdxStr = getelementptr inbounds %struct.info, %struct.info* %tmp0, i64 0, i32 7
+  %tmp3 = load i32, i32* %needToFreeIdxStr, align 8
   br i1 false, label %if.end149, label %if.then148
 
 if.then148:                                       ; preds = %for.end143
@@ -76,7 +76,7 @@ entry.split:
   br i1 %cmp8, label %for.body.lr.ph, label %for.cond.cleanup
 
 for.body.lr.ph:                                   ; preds = %entry.split
-  %0 = bitcast i32* %x to i8*
+  %tmp0 = bitcast i32* %x to i8*
   br label %for.body
 
 for.cond.cleanup:                                 ; preds = %for.body, %entry.split
@@ -85,7 +85,7 @@ for.cond.cleanup:
 for.body:                                         ; preds = %for.body, %for.body.lr.ph
   %i.09 = phi i64 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
   %mul = mul nsw i64 %i.09, %i.09
-  tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 %mul, i32 4, i1 false)
+  tail call void @llvm.memset.p0i8.i64(i8* %tmp0, i8 0, i64 %mul, i32 4, i1 false)
   %add = add nuw nsw i64 %i.09, 1000
   %arrayidx = getelementptr inbounds i32, i32* %x, i64 %add
   store i32 5, i32* %arrayidx, align 4

Modified: polly/trunk/test/ScopInfo/invariant-loads-leave-read-only-statements.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/ScopInfo/invariant-loads-leave-read-only-statements.ll?rev=301689&r1=301688&r2=301689&view=diff
==============================================================================
--- polly/trunk/test/ScopInfo/invariant-loads-leave-read-only-statements.ll (original)
+++ polly/trunk/test/ScopInfo/invariant-loads-leave-read-only-statements.ll Fri Apr 28 16:16:29 2017
@@ -4,119 +4,119 @@
 ; CHECK:      Statements {
 ; CHECK-NEXT:     Stmt_top_split
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [p_0, p_1, p_2] -> { Stmt_top_split[] };
+; CHECK-NEXT:             [tmp8, tmp22, tmp15] -> { Stmt_top_split[] };
 ; CHECK-NEXT:         Schedule :=
-; CHECK-NEXT:             [p_0, p_1, p_2] -> { Stmt_top_split[] -> [0, 0, 0, 0] };
+; CHECK-NEXT:             [tmp8, tmp22, tmp15] -> { Stmt_top_split[] -> [0, 0, 0, 0] };
 ; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:             [p_0, p_1, p_2] -> { Stmt_top_split[] -> MemRef_25[] };
+; CHECK-NEXT:             [tmp8, tmp22, tmp15] -> { Stmt_top_split[] -> MemRef_tmp25[] };
 ; CHECK-NEXT:     Stmt_L_4
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] : 0 <= i0 < p_0 and 0 <= i1 < p_0 and 0 <= i2 < p_0 };
+; CHECK-NEXT:             [tmp8, tmp22, tmp15] -> { Stmt_L_4[i0, i1, i2] : 0 <= i0 < tmp8 and 0 <= i1 < tmp8 and 0 <= i2 < tmp8 };
 ; CHECK-NEXT:         Schedule :=
-; CHECK-NEXT:             [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> [1, i0, i1, i2] };
+; CHECK-NEXT:             [tmp8, tmp22, tmp15] -> { Stmt_L_4[i0, i1, i2] -> [1, i0, i1, i2] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:             [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_19[i1, i0] };
+; CHECK-NEXT:             [tmp8, tmp22, tmp15] -> { Stmt_L_4[i0, i1, i2] -> MemRef_tmp19[i1, i0] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:             [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_5[i2, i0] };
+; CHECK-NEXT:             [tmp8, tmp22, tmp15] -> { Stmt_L_4[i0, i1, i2] -> MemRef_tmp5[i2, i0] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:             [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_12[i2, i1] };
+; CHECK-NEXT:             [tmp8, tmp22, tmp15] -> { Stmt_L_4[i0, i1, i2] -> MemRef_tmp12[i2, i1] };
 ; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:             [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_19[i1, i0] };
+; CHECK-NEXT:             [tmp8, tmp22, tmp15] -> { Stmt_L_4[i0, i1, i2] -> MemRef_tmp19[i1, i0] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:             [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_25[] };
+; CHECK-NEXT:             [tmp8, tmp22, tmp15] -> { Stmt_L_4[i0, i1, i2] -> MemRef_tmp25[] };
 ; CHECK-NEXT: }
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 %jl_value_t = type { %jl_value_t* }
 
-define %jl_value_t* @julia_gemm_22583(%jl_value_t*, %jl_value_t**, i32) {
+define %jl_value_t* @julia_gemm_22583(%jl_value_t*, %jl_value_t** %tmp1, i32) {
 top:
   br label %top.split
 
 top.split:                                        ; preds = %top
-  %3 = load %jl_value_t*, %jl_value_t** %1, align 8
-  %4 = bitcast %jl_value_t* %3 to double**
-  %5 = load double*, double** %4, align 8
-  %6 = getelementptr inbounds %jl_value_t, %jl_value_t* %3, i64 3, i32 0
-  %7 = bitcast %jl_value_t** %6 to i64*
-  %8 = load i64, i64* %7, align 8
-  %9 = getelementptr %jl_value_t*, %jl_value_t** %1, i64 1
-  %10 = load %jl_value_t*, %jl_value_t** %9, align 8
-  %11 = bitcast %jl_value_t* %10 to double**
-  %12 = load double*, double** %11, align 8
-  %13 = getelementptr inbounds %jl_value_t, %jl_value_t* %10, i64 3, i32 0
-  %14 = bitcast %jl_value_t** %13 to i64*
-  %15 = load i64, i64* %14, align 8
-  %16 = getelementptr %jl_value_t*, %jl_value_t** %1, i64 2
-  %17 = load %jl_value_t*, %jl_value_t** %16, align 8
-  %18 = bitcast %jl_value_t* %17 to double**
-  %19 = load double*, double** %18, align 8
-  %20 = getelementptr inbounds %jl_value_t, %jl_value_t* %17, i64 3, i32 0
-  %21 = bitcast %jl_value_t** %20 to i64*
-  %22 = load i64, i64* %21, align 8
-  %23 = icmp sgt i64 %8, 0
-  %24 = select i1 %23, i64 %8, i64 0
-  %25 = add i64 %24, 1
-  %26 = icmp eq i64 %24, 0
-  br i1 %26, label %L.11, label %L.preheader
+  %tmp3 = load %jl_value_t*, %jl_value_t** %tmp1, align 8
+  %tmp4 = bitcast %jl_value_t* %tmp3 to double**
+  %tmp5 = load double*, double** %tmp4, align 8
+  %tmp6 = getelementptr inbounds %jl_value_t, %jl_value_t* %tmp3, i64 3, i32 0
+  %tmp7 = bitcast %jl_value_t** %tmp6 to i64*
+  %tmp8 = load i64, i64* %tmp7, align 8
+  %tmp9 = getelementptr %jl_value_t*, %jl_value_t** %tmp1, i64 1
+  %tmp10 = load %jl_value_t*, %jl_value_t** %tmp9, align 8
+  %tmp11 = bitcast %jl_value_t* %tmp10 to double**
+  %tmp12 = load double*, double** %tmp11, align 8
+  %tmp13 = getelementptr inbounds %jl_value_t, %jl_value_t* %tmp10, i64 3, i32 0
+  %tmp14 = bitcast %jl_value_t** %tmp13 to i64*
+  %tmp15 = load i64, i64* %tmp14, align 8
+  %tmp16 = getelementptr %jl_value_t*, %jl_value_t** %tmp1, i64 2
+  %tmp17 = load %jl_value_t*, %jl_value_t** %tmp16, align 8
+  %tmp18 = bitcast %jl_value_t* %tmp17 to double**
+  %tmp19 = load double*, double** %tmp18, align 8
+  %tmp20 = getelementptr inbounds %jl_value_t, %jl_value_t* %tmp17, i64 3, i32 0
+  %tmp21 = bitcast %jl_value_t** %tmp20 to i64*
+  %tmp22 = load i64, i64* %tmp21, align 8
+  %tmp23 = icmp sgt i64 %tmp8, 0
+  %tmp24 = select i1 %tmp23, i64 %tmp8, i64 0
+  %tmp25 = add i64 %tmp24, 1
+  %tmp26 = icmp eq i64 %tmp24, 0
+  br i1 %tmp26, label %L.11, label %L.preheader
 
 L.preheader:                                      ; preds = %top.split
   br label %L
 
 L:                                                ; preds = %L.preheader, %L.9
-  %"#s5.0" = phi i64 [ %27, %L.9 ], [ 1, %L.preheader ]
-  %27 = add i64 %"#s5.0", 1
-  br i1 %26, label %L.9, label %L.2.preheader
+  %"#s5.0" = phi i64 [ %tmp27, %L.9 ], [ 1, %L.preheader ]
+  %tmp27 = add i64 %"#s5.0", 1
+  br i1 %tmp26, label %L.9, label %L.2.preheader
 
 L.2.preheader:                                    ; preds = %L
   br label %L.2
 
 L.2:                                              ; preds = %L.2.preheader, %L.7
-  %"#s4.0" = phi i64 [ %28, %L.7 ], [ 1, %L.2.preheader ]
-  %28 = add i64 %"#s4.0", 1
-  br i1 %26, label %L.7, label %L.4.preheader
+  %"#s4.0" = phi i64 [ %tmp28, %L.7 ], [ 1, %L.2.preheader ]
+  %tmp28 = add i64 %"#s4.0", 1
+  br i1 %tmp26, label %L.7, label %L.4.preheader
 
 L.4.preheader:                                    ; preds = %L.2
   br label %L.4
 
 L.4:                                              ; preds = %L.4.preheader, %L.4
-  %"#s3.0" = phi i64 [ %29, %L.4 ], [ 1, %L.4.preheader ]
-  %29 = add i64 %"#s3.0", 1
-  %30 = add i64 %"#s5.0", -1
-  %31 = add i64 %"#s4.0", -1
-  %32 = mul i64 %31, %22
-  %33 = add i64 %32, %30
-  %34 = getelementptr double, double* %19, i64 %33
-  %35 = load double, double* %34, align 8
-  %36 = add i64 %"#s3.0", -1
-  %37 = mul i64 %36, %8
-  %38 = add i64 %37, %30
-  %39 = getelementptr double, double* %5, i64 %38
-  %40 = load double, double* %39, align 8
-  %41 = mul i64 %36, %15
-  %42 = add i64 %41, %31
-  %43 = getelementptr double, double* %12, i64 %42
-  %44 = load double, double* %43, align 8
-  %45 = fmul double %40, %44
-  %46 = fadd double %35, %45
-  store double %46, double* %34, align 8
-  %47 = icmp eq i64 %29, %25
-  br i1 %47, label %L.7.loopexit, label %L.4
+  %"#s3.0" = phi i64 [ %tmp29, %L.4 ], [ 1, %L.4.preheader ]
+  %tmp29 = add i64 %"#s3.0", 1
+  %tmp30 = add i64 %"#s5.0", -1
+  %tmp31 = add i64 %"#s4.0", -1
+  %tmp32 = mul i64 %tmp31, %tmp22
+  %tmp33 = add i64 %tmp32, %tmp30
+  %tmp34 = getelementptr double, double* %tmp19, i64 %tmp33
+  %tmp35 = load double, double* %tmp34, align 8
+  %tmp36 = add i64 %"#s3.0", -1
+  %tmp37 = mul i64 %tmp36, %tmp8
+  %tmp38 = add i64 %tmp37, %tmp30
+  %tmp39 = getelementptr double, double* %tmp5, i64 %tmp38
+  %tmp40 = load double, double* %tmp39, align 8
+  %tmp41 = mul i64 %tmp36, %tmp15
+  %tmp42 = add i64 %tmp41, %tmp31
+  %tmp43 = getelementptr double, double* %tmp12, i64 %tmp42
+  %tmp44 = load double, double* %tmp43, align 8
+  %tmp45 = fmul double %tmp40, %tmp44
+  %tmp46 = fadd double %tmp35, %tmp45
+  store double %tmp46, double* %tmp34, align 8
+  %tmp47 = icmp eq i64 %tmp29, %tmp25
+  br i1 %tmp47, label %L.7.loopexit, label %L.4
 
 L.7.loopexit:                                     ; preds = %L.4
   br label %L.7
 
 L.7:                                              ; preds = %L.7.loopexit, %L.2
-  %48 = icmp eq i64 %28, %25
-  br i1 %48, label %L.9.loopexit, label %L.2
+  %tmp48 = icmp eq i64 %tmp28, %tmp25
+  br i1 %tmp48, label %L.9.loopexit, label %L.2
 
 L.9.loopexit:                                     ; preds = %L.7
   br label %L.9
 
 L.9:                                              ; preds = %L.9.loopexit, %L
-  %49 = icmp eq i64 %27, %25
-  br i1 %49, label %L.11.loopexit, label %L
+  %tmp49 = icmp eq i64 %tmp27, %tmp25
+  br i1 %tmp49, label %L.11.loopexit, label %L
 
 L.11.loopexit:                                    ; preds = %L.9
   br label %L.11

Modified: polly/trunk/test/ScopInfo/loop_carry.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/ScopInfo/loop_carry.ll?rev=301689&r1=301688&r2=301689&view=diff
==============================================================================
--- polly/trunk/test/ScopInfo/loop_carry.ll (original)
+++ polly/trunk/test/ScopInfo/loop_carry.ll Fri Apr 28 16:16:29 2017
@@ -23,21 +23,21 @@ bb.nph:
   br label %bb
 
 bb:                                               ; preds = %bb, %bb.nph
-  %1 = phi i64 [ %.pre, %bb.nph ], [ %2, %bb ]    ; <i64> [#uses=1]
+  %tmp1 = phi i64 [ %.pre, %bb.nph ], [ %tmp2, %bb ]    ; <i64> [#uses=1]
   %indvar = phi i64 [ 0, %bb.nph ], [ %tmp6, %bb ] ; <i64> [#uses=3]
-  %k.05 = phi i64 [ 1, %bb.nph ], [ %5, %bb ]     ; <i64> [#uses=1]
+  %k.05 = phi i64 [ 1, %bb.nph ], [ %tmp5, %bb ]     ; <i64> [#uses=1]
   %tmp6 = add i64 %indvar, 1                      ; <i64> [#uses=3]
   %scevgep = getelementptr i64, i64* %a, i64 %tmp6     ; <i64*> [#uses=1]
-  %2 = mul nsw i64 %1, %k.05                      ; <i64> [#uses=2]
-  store i64 %2, i64* %scevgep, align 8
+  %tmp2 = mul nsw i64 %tmp1, %k.05                      ; <i64> [#uses=2]
+  store i64 %tmp2, i64* %scevgep, align 8
   %tmp7 = shl i64 %indvar, 1                      ; <i64> [#uses=1]
   %tmp11 = add i64 %indvar, 4                     ; <i64> [#uses=1]
   %tmp8 = add i64 %tmp7, 2                        ; <i64> [#uses=1]
   %scevgep12 = getelementptr i64, i64* %a, i64 %tmp11  ; <i64*> [#uses=1]
   %scevgep9 = getelementptr i64, i64* %a, i64 %tmp8    ; <i64*> [#uses=1]
-  %3 = load i64, i64* %scevgep9, align 8               ; <i64> [#uses=1]
-  %4 = load i64, i64* %scevgep12, align 8              ; <i64> [#uses=1]
-  %5 = add nsw i64 %3, %4                         ; <i64> [#uses=1]
+  %tmp3 = load i64, i64* %scevgep9, align 8               ; <i64> [#uses=1]
+  %tmp4 = load i64, i64* %scevgep12, align 8              ; <i64> [#uses=1]
+  %tmp5 = add nsw i64 %tmp3, %tmp4                         ; <i64> [#uses=1]
   %exitcond = icmp eq i64 %tmp6, %tmp             ; <i1> [#uses=1]
   br i1 %exitcond, label %bb2, label %bb
 
@@ -53,9 +53,9 @@ bb2:
 ; CHECK-NEXT:         Schedule :=
 ; CHECK-NEXT:             [n] -> { Stmt_bb[i0] -> [i0] };
 ; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:             [n] -> { Stmt_bb[i0] -> MemRef_1__phi[] };
+; CHECK-NEXT:             [n] -> { Stmt_bb[i0] -> MemRef_tmp1__phi[] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:             [n] -> { Stmt_bb[i0] -> MemRef_1__phi[] };
+; CHECK-NEXT:             [n] -> { Stmt_bb[i0] -> MemRef_tmp1__phi[] };
 ; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
 ; CHECK-NEXT:             [n] -> { Stmt_bb[i0] -> MemRef_k_05__phi[] };
 ; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]

Modified: polly/trunk/test/ScopInfo/parameter-constant-division.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/ScopInfo/parameter-constant-division.ll?rev=301689&r1=301688&r2=301689&view=diff
==============================================================================
--- polly/trunk/test/ScopInfo/parameter-constant-division.ll (original)
+++ polly/trunk/test/ScopInfo/parameter-constant-division.ll Fri Apr 28 16:16:29 2017
@@ -4,7 +4,7 @@
 ;
 ; CHECK:          Invariant Accesses: {
 ; CHECK-NEXT:            ReadAccess :=	[Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:                { Stmt_land_lhs_true563[] -> MemRef_0[809] };
+; CHECK-NEXT:                { Stmt_land_lhs_true563[] -> MemRef_tmp0[809] };
 ; CHECK-NEXT:            Execution Context: {  :  }
 ; CHECK-NEXT:            ReadAccess :=	[Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:                { Stmt_if_then570[] -> MemRef_fs[5] };
@@ -13,16 +13,16 @@
 ; CHECK-NEXT:                { Stmt_if_then570[] -> MemRef_fs[7] };
 ; CHECK-NEXT:            Execution Context: {  :  }
 ; CHECK-NEXT:            ReadAccess :=	[Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:                { Stmt_if_then570[] -> MemRef_8[813] };
+; CHECK-NEXT:                { Stmt_if_then570[] -> MemRef_tmp8[813] };
 ; CHECK-NEXT:            Execution Context: {  :  }
 ; CHECK-NEXT:            ReadAccess :=	[Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:                { Stmt_if_then570[] -> MemRef_3[813] };
+; CHECK-NEXT:                { Stmt_if_then570[] -> MemRef_tmp3[813] };
 ; CHECK-NEXT:            Execution Context: {  :  }
 ; CHECK-NEXT:            ReadAccess :=	[Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:                { Stmt_if_then570[] -> MemRef_5[813] };
+; CHECK-NEXT:                { Stmt_if_then570[] -> MemRef_tmp5[813] };
 ; CHECK-NEXT:            Execution Context: {  :  }
 ; CHECK-NEXT:            ReadAccess :=	[Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:                { Stmt_if_then570[] -> MemRef_3[812] };
+; CHECK-NEXT:                { Stmt_if_then570[] -> MemRef_tmp3[812] };
 ; CHECK-NEXT:            Execution Context: {  :  }
 ; CHECK-NEXT:    }
 ;
@@ -43,7 +43,7 @@ for.cond538.preheader.lr.ph:
   br label %for.cond538.preheader
 
 for.cond538.preheader:                            ; preds = %for.inc912, %for.cond538.preheader.lr.ph
-  %0 = phi %struct.picture* [ undef, %for.cond538.preheader.lr.ph ], [ %11, %for.inc912 ]
+  %tmp0 = phi %struct.picture* [ undef, %for.cond538.preheader.lr.ph ], [ %tmp11, %for.inc912 ]
   br i1 undef, label %land.lhs.true563, label %for.inc912
 
 land.lhs.true563:                                 ; preds = %for.cond538.preheader
@@ -51,42 +51,42 @@ land.lhs.true563:
   %div554 = sdiv i32 0, 4
   %mul555 = mul i32 %div552, %div554
   %rem558 = srem i32 0, 2
-  %tmp9 = add i32 %mul555, 0
-  %tmp10 = shl i32 %tmp9, 1
-  %add559 = add i32 %tmp10, %rem558
+  %tmp9a = add i32 %mul555, 0
+  %tmp10a = shl i32 %tmp9a, 1
+  %add559 = add i32 %tmp10a, %rem558
   %idxprom564 = sext i32 %add559 to i64
-  %mb_field566 = getelementptr inbounds %struct.picture, %struct.picture* %0, i64 0, i32 31
-  %1 = load i8*, i8** %mb_field566, align 8
-  %arrayidx567 = getelementptr inbounds i8, i8* %1, i64 %idxprom564
-  %2 = load i8, i8* %arrayidx567, align 1
+  %mb_field566 = getelementptr inbounds %struct.picture, %struct.picture* %tmp0, i64 0, i32 31
+  %tmp1 = load i8*, i8** %mb_field566, align 8
+  %arrayidx567 = getelementptr inbounds i8, i8* %tmp1, i64 %idxprom564
+  %tmp2 = load i8, i8* %arrayidx567, align 1
   store i8 0, i8* %arrayidx567
   br i1 false, label %if.end908, label %if.then570
 
 if.then570:                                       ; preds = %land.lhs.true563
-  %3 = load %struct.picture*, %struct.picture** %frame, align 8
-  %mv = getelementptr inbounds %struct.picture, %struct.picture* %3, i64 0, i32 35
-  %4 = load i16****, i16***** %mv, align 8
-  %5 = load %struct.picture*, %struct.picture** %bottom_field578, align 8
-  %mv612 = getelementptr inbounds %struct.picture, %struct.picture* %5, i64 0, i32 35
-  %6 = load i16****, i16***** %mv612, align 8
-  %arrayidx647 = getelementptr inbounds i16***, i16**** %4, i64 1
-  %ref_id726 = getelementptr inbounds %struct.picture, %struct.picture* %3, i64 0, i32 34
-  %7 = load i64***, i64**** %ref_id726, align 8
-  %arrayidx746 = getelementptr inbounds i64**, i64*** %7, i64 5
-  %8 = load %struct.picture*, %struct.picture** %frame, align 8
-  %mv783 = getelementptr inbounds %struct.picture, %struct.picture* %8, i64 0, i32 35
-  %9 = load i16****, i16***** %mv783, align 8
-  %arrayidx804 = getelementptr inbounds i16***, i16**** %9, i64 1
-  %10 = load i16***, i16**** %arrayidx804, align 8
-  %arrayidx805 = getelementptr inbounds i16**, i16*** %10, i64 0
-  store i16*** %10, i16**** %arrayidx804
+  %tmp3 = load %struct.picture*, %struct.picture** %frame, align 8
+  %mv = getelementptr inbounds %struct.picture, %struct.picture* %tmp3, i64 0, i32 35
+  %tmp4 = load i16****, i16***** %mv, align 8
+  %tmp5 = load %struct.picture*, %struct.picture** %bottom_field578, align 8
+  %mv612 = getelementptr inbounds %struct.picture, %struct.picture* %tmp5, i64 0, i32 35
+  %tmp6 = load i16****, i16***** %mv612, align 8
+  %arrayidx647 = getelementptr inbounds i16***, i16**** %tmp4, i64 1
+  %ref_id726 = getelementptr inbounds %struct.picture, %struct.picture* %tmp3, i64 0, i32 34
+  %tmp7 = load i64***, i64**** %ref_id726, align 8
+  %arrayidx746 = getelementptr inbounds i64**, i64*** %tmp7, i64 5
+  %tmp8 = load %struct.picture*, %struct.picture** %frame, align 8
+  %mv783 = getelementptr inbounds %struct.picture, %struct.picture* %tmp8, i64 0, i32 35
+  %tmp9 = load i16****, i16***** %mv783, align 8
+  %arrayidx804 = getelementptr inbounds i16***, i16**** %tmp9, i64 1
+  %tmp10 = load i16***, i16**** %arrayidx804, align 8
+  %arrayidx805 = getelementptr inbounds i16**, i16*** %tmp10, i64 0
+  store i16*** %tmp10, i16**** %arrayidx804
   br label %if.end908
 
 if.end908:                                        ; preds = %if.then570, %land.lhs.true563
   br label %for.inc912
 
 for.inc912:                                       ; preds = %if.end908, %for.cond538.preheader
-  %11 = phi %struct.picture* [ %0, %for.cond538.preheader ], [ undef, %if.end908 ]
+  %tmp11 = phi %struct.picture* [ %tmp0, %for.cond538.preheader ], [ undef, %if.end908 ]
   br i1 undef, label %for.cond538.preheader, label %for.cond1392.preheader
 
 for.cond1392.preheader:                           ; preds = %for.inc912




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