[PATCH] D32564: AArch64: compress jump tables to minimum size needed to reach destinations

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

If I'm following correctly, for PIC small-code-model code (which is what mostly matters these days), the comparison is this:

1. On trunk we take 4 instructions to compute the destination for the jump: two to load the address of the jump table, one to load from the jump table, one to add the jump-table-relative offset offset to the address of the jump table.
2. With this technique, we take 5 instructions: two to load the address of the jump table, one to load from the jump table, one to load the current PC, and one to add the PC-relative offset to the PC.

Is that right?

If you're looking to save size, we could put the jump table into the text segment just after the branch, and compute the jump destination in three instructions: one to load the address of the table, one to load the offset from the table, and one to add the offset to the address of the table.  Is there some reason we shouldn't do that?


Repository:
  rL LLVM

https://reviews.llvm.org/D32564